jtag debugger dosen't finds the connected cyclon ll processor

[Altera_Forum]

Hi I am using cyclon ll processor and Nios2 13.0 IDE. I have started facing a problem that my USB blaster doesn't recognize the hardware.  

When i did jtagconfig -d  1) USB-Blaster [USB-0]  Unable to read device chain (JTAG chain broken)    Captured DR after reset = (020B20DD)  Captured IR after reset = ()  Captured Bypass after reset = (0)  Captured Bypass chain = ()  In Quartus ll 32-bit programmer, when i add an .sof file for chain test, it says failed.  Surprisingly my board is working fine, boots normally. The only issue is that blaster cable is not discovering it. Looks like some issue with jtag chain connection. https://alteraforum.com/forum/attachment.php?attachmentid=14514&stc=1

[Altera_Forum]

--- Quote Start ---  But when I try to program controller I get error   --- Quote End ---  What sort of 'error'?  Your description and screen shots all show everything working. I can't read green trace messages. However, green messages are good, red are bad. the '100% (successful)' indicates the FPGA has programmed successfully.  Does your FPGA not do what you expect when it's programmed?  Cheers, Alex

[Altera_Forum]

What do you mean program the controller? The Cyclone 2 is an FPGA , the NIOS II is a soft core processor. So, you've used the NIOS processor and built an SoC kind of subsystem in the FPGA. The FPGA programming is also successful. When you say controller are you referring to the Software for the NIOS subsystem? If so, then you have some issue with the SW that you've written for the NIOS. I'd suggest you check the HW design for correctness, then verify that you've initialized the NIOS in the EDS correctly. If all is done correctly, the NIOS should boot and run your code. 

 Please refer to the NIOS manual . It contains all the details on using it in a design.  https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/nios2/n2cpu_nii5v1.pdf  https://www.altera.com/en_us/pdfs/literature/hb/nios2/n2cpu-nii5v1gen2.pdf  https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_nios2_flash_programmer.pdf

[Altera_Forum]

Sorry for making confusion, I am using altera Cyclone 2 FPGA, which doesn't gets identified by Blaster cable. When ever I do  

"jtaconfig -n" I get,  USB-Blaster [1-2] Unable to read device chain (JTAG chain broken).  But when I apply power supply to the board, it boots up normally. At the same time blaster cable doesn't identify the board.

[Altera_Forum]

--- Quote Start ---  Sorry for making confusion, I am using altera Cyclone 2 FPGA, which doesn't gets identified by Blaster cable. When ever I do  "jtaconfig -n" I get,  USB-Blaster [1-2] Unable to read device chain (JTAG chain broken).  But when I apply power supply to the board, it boots up normally. At the same time blaster cable doesn't identify the board.  --- Quote End ---    The screenshot you posted doesn't match up with what you are saying. I guess that is the confusion here.  Are you talking about executing code on the Nios in the IDE? This is a separate operation from programming the FPGA with the hardware design.

[Altera_Forum]

Have edited the post, kindly have a look.

[Altera_Forum]

By 'edited the post' you mean re-written it so that the discussion thread no longer makes sense. Please don't do that - just add more to the bottom... 

   --- Quote Start ---  But when I apply power supply to the board, it boots up normally  --- Quote End ---  Boots from where? EPCS?  Yes - the JTAG chain integrity is clearly questionable. Do you have particularly long JTAG traces? Have you provided power to the USB-Blaster from the target? Are you confident in your USB-Blaster? Have you proved your USB-Blaster and cable on another board?  Cheers, Alex

[Altera_Forum]

Yes, i have provided power to USB-blaster from target. 

The USB-Blaster cable works well with another kit. Can identify them easily when connected, but not particularly this board. By Boot, I meant when I supply power on the board its works but doesn't gets discovered by USB-Blaster.

[Altera_Forum]

Is this a custom board or a development kit? 

 If it's a kit then it sounds like the FPGA may have suffered and one of the JTGA buffers on it may be damaged.  The same may be true of a custom board. Has it ever worked? Alternatively, the device may not be soldered down correctly or the JTAG traces may simply be too long.  I assume you can't auto-detect the JTAG chain?  Cheers, Alex

[Altera_Forum]

Yes its a custom board, It was working fine some times back. 

Yes I can't auto-detect the JTAG chain. In case any of the JTAG buffer has got damaged, how can I repair It? Can we just follow some steps to verify where exactly the issue is and make board working again.

[Altera_Forum]

Unfortunately, the JTAG buffers I'm referring to are in the Cyclone II device. If the board no longer auto-detects (but previously did) then one or more of the four JTAG pin input/output buffers is likely to have failed. This is most likely due to static damage or accidentally over-driving them. 

 Cheers, Alex

[Altera_Forum]

Oky, if JTAG is faulty. Is their any other way I can program the board? Means any other interface other than JTAG for flashing the processor.

[Altera_Forum]

See the "ps configuration using a download cable" section in the "configuring cyclone ii devices (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyc2/cyc2_cii51013.pdf)" chapter of the handbook - page 13-48 and refer to figure 13-19. 

 Cheers, Alex