Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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out of memory during elaboration.

Altera_Forum
Honored Contributor II
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Hi, 

 

I am new user of Quartus II on winXP/32bit, 30 days evaluation version. 

The PC ha 2GB of internakl RAM, coreduo. 

 

I am mapping on Stratix IV E EP4SE530H35C2NES target a 

design with about 2 Milions asic/gate equivalent. 

 

I get an "out of memory" when the design is under "Analysis and Elaborating" 

step. 

 

Please, could somebody tell me if the PC resources that I am using, 

for this design is enough? 

 

By documentation I understand to execute a partitioning, 

I need to execute at least the "Elaboration step", is that right? 

 

Thanks in advance.
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Altera_Forum
Honored Contributor II
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out of memory in Analysis and Elaboration is interesting, but you'll need some more RAM for a full SIV530E compilation: 

 

http://www.altera.com/literature/rn/rn_qts_dev_support.pdf 

 

as a test try selecting another device and running Analysis and Elaboration. there shouldn't be anything family/device specific at that point.
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Altera_Forum
Honored Contributor II
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please also monitor your memory usage during "Analysis and Synthesis", you might need to bump your RAM memory to 4 GB.

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