peak wire utilization 100% over

[sakrin]

After compiling a design, I looked at the Global Router Wire Utilization Map and saw that some of the utilization exceeded 100%. However, it seems that bitstreams are being generated.

Does this bitstream work properly?

This has been translated into English by a translation site. I apologize if it is incomplete.

[RichardTanSY_Intel · Accepted solution]

The Global Router Wire Utilization Map gives a visual representation of estimated wire usage on the chip and give detailed information about what might be causing the route congestion.

Unless there is a fitter error saying unsuccessful, it should Not impact the bitstream generated once compilation passed.

[sakrin]

I understand now, thanks to you！