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Valued Contributor III
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please help me out with instatiotion problem

i have problem abt the instatiotion, when i run the code i got this message from the quartus II...i make it red where it detects the error...please help me 

 

error: node instance "comp1" instantiates undefined entity "controller" 

error: node instance "ram1" instantiates undefined entity "generic_ram" 

Error: Quartus II Analysis & Synthesis was unsuccessful. 2 errors, 3 warnings 

Error: Peak virtual memory: 238 megabytes 

Error: Processing ended: Sun Dec 16 11:23:31 2012 

Error: Elapsed time: 00:00:04 

Error: Total CPU time (on all processors): 00:00:04 

Error: Quartus II Full Compilation was unsuccessful. 4 errors, 3 warnings 

 

 

 

 

 

library ieee; 

 

use ieee.std_logic_1164.all; 

use ieee.std_logic_unsigned.all; 

 

entity voice is  

generic  

( WORD_SIZE : Natural :=8; 

RAM_DEPTH : Natural :=32; 

ADDRESS_LENGTH : Natural :=5); 

 

port( 

test_data : in std_logic_vector ( WORD_SIZE-1 downto 0); 

config_in : in std_logic_vector ( WORD_SIZE-1 downto 0); 

clk : in std_logic; 

nrst :in std_logic; 

config : in std_logic; 

check : in std_logic; 

max_add : in std_logic_vector( ADDRESS_LENGTH-1 downto 0); 

--samp_out :in std_logic_vector ( WORD_SIZE-1 downto 0);--from ram 

--samp_in :out std_logic_vector ( WORD_SIZE-1 downto 0);--to ram 

test_en : out std_logic; 

test_rdwr : out std_logic; 

test_add : out std_logic_vector( ADDRESS_LENGTH-1 downto 0); 

test_ok : out std_logic; 

see_result: out std_logic; 

seg_addr : out std_logic_vector( ADDRESS_LENGTH-1 downto 0) 

); 

end voice; 

 

architecture top of voice is 

 

component GENERIC_RAM is 

generic  

( WORD_SIZE : Natural :=8; 

RAM_DEPTH : Natural :=32; 

ADDRESS_LENGTH : Natural :=5); 

 

port( clk : in std_logic; 

nrst : in std_logic; 

rd_wr : in std_logic; 

ram_en :in std_logic; 

address : in std_logic_vector( ADDRESS_LENGTH-1 downto 0); 

datain: in std_logic_vector ( WORD_SIZE-1 downto 0); 

dataout: out std_logic_vector ( WORD_SIZE-1 downto 0) 

); 

end component; 

 

 

component controller  

generic 

( WORD_SIZE : Natural :=8; 

RAM_DEPTH : Natural :=32; 

ADDRESS_LENGTH : Natural :=5); 

 

port( 

test_data : in std_logic_vector ( WORD_SIZE-1 downto 0); 

config_in : in std_logic_vector ( WORD_SIZE-1 downto 0); 

clk : in std_logic; 

nrst :in std_logic; 

config : in std_logic; 

check : in std_logic; 

max_add : in std_logic_vector( ADDRESS_LENGTH-1 downto 0); 

samp_out :out std_logic_vector ( WORD_SIZE-1 downto 0);--from ram 

samp_in :in std_logic_vector ( WORD_SIZE-1 downto 0);--to ram 

test_en : out std_logic; 

test_rdwr : out std_logic; 

test_add : out std_logic_vector( ADDRESS_LENGTH-1 downto 0); 

test_ok : out std_logic; 

samp_add : out std_logic_vector( ADDRESS_LENGTH-1 downto 0); 

samp_en : out std_logic; 

samp_rdwr :out std_logic;  

see_result: out std_logic; 

seg_addr : out std_logic_vector( ADDRESS_LENGTH-1 downto 0) 

); 

end component; 

 

signal address : std_logic_vector(ADDRESS_LENGTH-1 downto  

0):=(others=> 'Z'); 

signal rd_wr : std_logic := 'Z'; 

signal ram_en : std_logic := 'Z'; 

 

signal samp_out : std_logic_vector ( WORD_SIZE-1 downto 0); -- from ram 

signal samp_in : std_logic_vector ( WORD_SIZE-1 downto 0); -- from ram 

 

begin 

 

--instatiating controller block 

 

comp1 : controller port map ( test_data => test_data, 

config_in => config_in, 

clk => clk, 

nrst => nrst, 

config => config, 

check => check, 

max_add => max_add, 

samp_out => samp_out, 

samp_in => samp_in, 

test_en => test_en, 

test_rdwr => test_rdwr, 

test_ok => test_ok, 

see_result => see_result, 

samp_add => address, 

samp_en => ram_en, 

samp_rdwr => rd_wr, 

seg_addr => seg_addr); 

 

-- instatiating memory block 

 

ram1: generic_ram port map ( clk => clk, 

nrst => nrst, 

rd_wr => rd_wr, 

ram_en => ram_en, 

address => address, 

datain=> samp_in, 

dataout=> samp_out); 

 

end top;
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2 Replies
Highlighted
Valued Contributor III

Re: please help me out with instatiotion problem

Have you included the source code for "controller" and GENERIC_RAM in your project and compiled them before this code?

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Highlighted
Valued Contributor III

Re: please help me out with instatiotion problem

no sir i was trying to compile one by one...so it means that i have to compile all the codes in one time....thanks in advance sir

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