.pof file generates "top level design entity" undefined error

[Aeneas]

.pof file generates 12007 "top level design entity" "undefined" error,

in a MAX 10 design which self-identifies as 10M08SAU169 ,

under Quartus Prime Version 20.1.1 Build 720

Windows 7 64 .

Under Quartus II, where are the 2 items which are being compared

and are mismatched ?

[sstrell]

When and where are you seeing this error?  When you program the device flash?  Does your project compile successfully?

[Aeneas]

During:   Start Compilation,     Start Analysis and Elaboration,   Start Analysis and Synthesis

I have no Jtag or PCB fixture yet, so I am intending only to Simulate.

=======================================================================

Error (12007): Top-level design entity "TEI0023_adc-adaq4003_20200716" is undefined
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 565 megabytes
Error: Processing ended: Sun Sep 12 15:43:30 2021
Error: Elapsed time: 00:00:13

Error: Total CPU time (on all processors): 00:00:33
Error (293001): Quartus Prime Full Compilation was unsuccessful. 3 errors, 1 warning

========================================================================

[Ash_R_Intel]

Did you set the top-level entity/module before starting the compilation?

Refer screenshot below:

Regards

[Aeneas]

Wherever I have seen that question, I have told it to set

it to the Top Level Design Entity.

Is there a simple way to dump out the exact contents of

the .pof file?

Is there any way to Edit the .pof file ?

I did not create it and am not sure what is in it,

but the project name selected

"must exactly  match the entity name in the design file" .

[Ash_R_Intel]

Can you please elaborate the steps that were followed to recreate the error? 

What type of files are input to the Quartus project?

The error message that you had mentioned is encountered when conditions mentioned in the following help link occur:

https://www.intel.com/content/www/us/en/programmable/quartushelp/13.0/mergedProjects/msgs/msgs/esgn_top_entity_is_missing.htm

Regards

[Aeneas]

start Quartus Prime Lite

click Open Project

broaden file filter to *.*, to allow *.pof files

open *.pof file

New Project Wizard

enter working diretory containing .pof, project name, and top-level-design-entity

select Empty Project

finish

Start Compilation

========================================

Error (12007): Top-level design entity "TEI0023_adc-adaq4003_20200716" is undefined
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 566 megabytes
Error: Processing ended: Mon Sep 13 11:40:15 2021
Error: Elapsed time: 00:00:09
Error: Total CPU time (on all processors): 00:00:23
Error (293001): Quartus Prime Full Compilation was unsuccessful. 3 errors, 1 warning

=========================================

[sstrell · Accepted solution]

A .pof is a binary programming file.  You can't open it.  It's an output of the Assembler, part of the compilation process.

You need the original HDL (.v or .vhd) or schematic design files (.bdf) to open and look at the design.  You can't do anything with a .pof other than program a device or flash with it.

[Aeneas]

So it sounds like it is an error for Quartus to allow a compilation project

to be based on a .pof ? 

Why would this result in a top-level-design-entity undefined error.

[sstrell]

Because a .pof is not a design file so it can't have a top-level entity.  Like I said, you need a design file (.v, .vhd, .bdf, .qsys, etc.).

[Ash_R_Intel]

Agree with @sstrell