Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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preserve_for_debug, only available in Quartus pro?

AEsqu
Novice
142 Views

I saw an Intel video on youtube that explains how to use  in the .qsf :

https://www.youtube.com/watch?v=sEKc2ut42gU

 

set_global_assignment -name PRESERVE_FOR_DEBUG_ENABLE ON

and in the RTL code 

attribute preserve_for_debug of my_signal_keep : signal is true;

 

But they never mention if this is only for Quartus pro only (and not standard).

As I use a cyclone V FPGA, I'm forced to use Quartus Std, and I have the impression this is not available there.

I wanted to use it because my keep attribute was not working (the net was removed):

attribute keep of my_net_to_keep : signal is true;

but I got it kept by changing this option in the QSF (from ON value):

set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS OFF

 

0 Kudos
3 Replies
sstrell
Honored Contributor III
124 Views

This new feature is Pro only.

AEsqu
Novice
106 Views

ok, please mention it in the youtube video comments.

ShengN_Intel
Employee
115 Views

Hi


May I know does the comment above helps? 

Do you need further help in regards to this case?


Thank you.

Best Regards,

Sheng


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