set_false_path - how to define a register

[fogl]

Hello everybody,

I designed a clock domain crossing synchronizer, which causes a timing constraints failure. I would like to add a set_false_path contraint to solve this error, but i am having problems.

set_false_path -from [get_registers  moduleA:moduleB|sync_Pulse:\intel_specific:sync_cdc|streched_input_pulse] -to [get_registers moduleA:moduleB|sync_Pulse:\intel_specific:sync_cdc|streched_output_pulse_metastable]

I got those two register values from timing analysist report. - "From Node" and "To Node". It seems this is not the right source for register names, because i get an error: During Timing Analysis a get a message "Warning (332049): Ignored set_false_path at timing.sdc: Argument <from> is an empty collection.

Where can i get the right register name?

Regards

[Schroeti]

Regarding signal names it is easier to use inline constraints. I had the same problem, so i took a look into the altera_std_synchronizer.v file to see how this was done by Altera. You should find it somewhere in the quartus installation directory.

[fogl]

Thank you for your reply. I found this example: https://github.com/MrX-8B/MiSTer-Arcade-Druaga/blob/master/sys/pll_hdmi_cfg/altera_std_synchronizer.v

(* altera_attribute = {"-name ADV_NETLIST_OPT_ALLOWED NEVER_ALLOW; -name SYNCHRONIZER_IDENTIFICATION FORCED_IF_ASYNCHRONOUS; -name DONT_MERGE_REGISTER ON; -name PRESERVE_REGISTER ON; -name SDC_STATEMENT \"set_false_path -to [get_keepers {*altera_std_synchronizer:*|din_s1}]\" "} *) reg din_s1;

I am using VHDL, but i assumed the attribute syntax is the same. When i run this, i get:

Error (10500): VHDL syntax error near text "*"; expecting "(", or an identifier, or unary operator.

[Schroeti]

I am also using VHDL. My attributes are the following:

attribute altera_attribute of s_reg_in : signal is "-name ADV_NETLIST_OPT_ALLOWED NEVER_ALLOW; -name SYNCHRONIZER_IDENTIFICATION FORCED; -name DONT_MERGE_REGISTER ON; -name PRESERVE_REGISTER ON ";
attribute altera_attribute of s_reg_sync : signal is "-name ADV_NETLIST_OPT_ALLOWED NEVER_ALLOW; -name DONT_MERGE_REGISTER ON; -name PRESERVE_REGISTER ON";
attribute altera_attribute of behaviour : architecture is "-name SDC_STATEMENT ""set_false_path -to [get_registers *synchronizer:*|s_reg_in]""";

Copy the code, change the signal names and you should be fine.

[sstrell]

The easiest way to find nodes and set this up in your .sdc is to use the GUI dialog box from the Quartus text editor (Edit menu -> Insert constraint).  If you edit your .sdc there, you can open the Name Finder tool from the dialog box to search your design and find exactly what you want to apply the constraint to with the correct syntax.

[Kenny_Tan]

Since this thread had been answered, we shall close this thread. If you still need further assistance, you are welcome to post a response within 15days or open a new thread, some one will be right with you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions. 

[fogl]

Thank you for your reply. I managed to set the constraint using the GUI.

But actually i prefer the attribute syntax (i am still trying to get it right), because in that case you don't have to write a new false path constraint for every new instance of the synchronizer.

Regards

Klemen