1.How to simulate Atx pll and native Phy and reset controller in modelsim(arria 10 10GBPS)?
2.while simulating Atx pll and native phy IP, tool is showing supported files Protected, then How to simulate that protected files?
As I understand it, you have some inquiries related to simulating a design with ATX PLL and Native PHY. For your information, I have attached a simple simulation example previous from wiki for your reference. This design consist of ATX PLL + Native PHY.
To run the simulation, do the following:
1. Unzip and change Modelsim working directory to the folder
2. Type "source simulation_setup.tcl"
3. Type "ld" to compile the required files
4. Type "simulate" to populate the waveforms and run the simulation
This example is intended for dynamic reconfiguration. You may ignore the dynamic reconfiguration steps in test bench and focus on how to setup and simulate with Native PHY.
Please let me know if there is any concern. Thank you.
As I understand it, it has been some time since I last heard from you. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.