timing analyzer : about inter-path competition

[Yogesh]

Suppose I get timing recommendations on two 8bit signals path_A and path_B , as below:

Duplicate the nodes specified in the details for the path from path_A to path_B
Issue: Inter-path Competition
From: path_A
To:      path_B

Nodes to duplicate:  path_A

Suppose i want Use the Manual Logic Duplication or Maximum Fan-Out logic options to create duplicate nodes.

FInd my questions below:

1)What should be added/filled in below fields of assignment editor for using Manual Logic Duplication ?

From:  path_A

To:  path_B

Assignment name: Manual Logic Duplication

Value: ??????????(is it some random user name)

enabled : Yes

2)What should be added/filled in below fields of assignment editor for using Maximum Fan-Out?

From:  path_A

To:  path_B

Assignment name: Maximum Fan-Out

Value: ??????????(is it some random number? if yes ?what number? How to choose this number?)

enabled : Yes

3) what is the difference between both Manual Logic Duplication and Maximum Fan-Out ? and which option will give better timing?

[sstrell]

The short answer right off the bat is that you shouldn't use either assignment since you have very little control over how the software will adjust things in your design.  Perform manual register/node duplication in your HDL code to have complete control over how the design is adjusted to fix the timing issue.

The slightly longer answer is that all assignments in the Assignment Editor are discussed in detail in the built-in help.  From the help table of contents, look for the "Logic Options" section and you'll find this:

https://www.intel.com/content/www/us/en/programmable/quartushelp/current/index.htm#logicops/logicops/def_duplicate_atom.htm

And unfortunately, I'm looking at it and you're right that the help doesn't define what the value should be!  It actually is just the name you want to give to the duplicated node that you're creating.  For max fanout, the value is the fanout limit.  So if you set a value of 64 and the node has a fanout of 65, the node will be duplicated and one fanout will be moved to the duplicated node.  There's no defined strategy for what value to pick for this value, so that's why it's recommended to do this manually in HDL.

#iwork4intel

[Kenny_Tan]

Yup, Usually best to do manual register duplication and preservation

We do not rely on MAX_FANOUT assignment, because

• May make arbitrary groups of fanout nodes
• You as the designer can make more intelligent fanout grouping choices

[Kenny_Tan]

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[Yogesh]

Issue: Inter-path Competition
From: path_A
To: path_B

Nodes to duplicate: path_A

I Used the Manual Logic Duplication to create duplicate nodes.

In the assignment I used Manual Logic Duplication as below?

From: path_A
To: path_B
Assignment name: Manual Logic Duplication
Value : random name
enabled : Yes

But after this if I run fitter, I get below warning and timing doesnt improve .

Warning (171070): Can't duplicate node "<node_A>" -- node does not exist

What is wrong here?