Attached you will find a VHDL-file, which implements an FSM and uses the function "next_crc16_d8(..)" to calculate the CRC.
The file compiles fine for Questa, but fails in QuartusPrime 18.1 on line 141, because the signal "tx_data", which is an output, is used as an input to the function (Error (10600): VHDL error at tx_frame_rtl.vhd(141): can't read value of interface object "tx_data" of mode OUT)
Additionally, when activating line 89 for the signal "tx_parity" to calculate the parity using the unary operator XOR for a vector, this also fails!
Having the year 2020, it's still astonishing that Intel can't handle basic VHDL-2008 standards. It's a pity or are there any workarounds / solutions / updates?
By the way,
set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008
Let me know, if something is missing to reproduce the problem!
I've also encountered this lack of support for VHDL-2008. I often get my code simulating properly in Questa only to find that a VHDL code construct I used isn't supported by Quartus.
Following this thread in case you get a solution...
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