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I generate the RTL module by "QuartusPrime_v20.1.0". But when compiling RTL, I get an error "xmvlog: *E,ERRIPR: error within protected source code.". Please let me know the solution for this. Note : RTL compile tools is Cadence's "XCELIUM_v20.09.001".
Question.
Perhaps the Error is output from a cyclonev_atoms_ncrypt.v file.
command to read the List1 file in order to successfully read List2.
Is there a missing read file?
Is there an option required when running xrun for the command?
### List1
-v ./quartus/eda/sim_lib/altera_primitives.v
-v ./quartus/eda/sim_lib/220model.v
-v ./quartus/eda/sim_lib/sgate.v
-v ./quartus/eda/sim_lib/altera_mf.v
-v ./quartus/eda/sim_lib/altera_lnsim.sv
-v ./quartus/eda/sim_lib/cyclonev_atoms.v
-v ./quartus/eda/sim_lib/cyclonev_hssi_atoms.v
-v ./quartus/eda/sim_lib/cyclonev_hps_atoms.sv
-v ./quartus/eda/sim_lib/cyclonev_pcie_hip_atoms.v
### List2
-v ./quartus/eda/sim_lib/cadence/cyclonev_hssi_atoms_ncrypt.v
-v ./quartus/eda/sim_lib/cadence/cyclonev_atoms_ncrypt.v
-v ./quartus/eda/sim_lib/cadence/cyclonev_hmi_atoms_ncrypt.v
-v ./quartus/eda/sim_lib/cadence/cyclonev_pcie_hip_atoms_ncrypt.v
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Hi,
Could you provide the example design for testing out?
Regards,
Sheng
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Hi,
You may ignore the previous post. Are you using xrun for the command? I further found out this previous internal message check image attached.
xrun is not yet supported. Probably will be supported in future release.
Best Regards,
Sheng
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
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Just want to check, is this still the case "xrun is not yet supported"? I am asking this in relation to my recent post at Re:PCIe hard IP simulation on Xcelium
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Hi ,
I am using xrun.
1. I have added the option "-sysv2005" to the command, and this error was avoided.
Is this not an official method?
2. Is INCISIVE supported?
If supported, what version is recommended?
Best Regards,
Ohara
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Hi Ohara,
1.If you still encounter other errors with xrun, please consider to use Cadence Xcelium* Simulator Setup Scripts check this link https://www.intel.com/content/www/us/en/docs/programmable/683870/22-4/sourcing-cadence-simulator-setup-scripts.html
2. Yes, INCISIVE is supported. But, it's not supported starting from version 21.1 check this document https://www.intel.com/content/www/us/en/docs/programmable/683870/21-1/introduction.html (page 35)
Best Regards,
Sheng
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
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Hi Ohara,
Do you have any further concern or consideration on this thread?
Best Regards,
Sheng
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
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Thank you for your response.
We will make our decision based on the information we received from support.
I will close the case.

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