Intel® SoC FPGA Embedded Development Suite
Support for SoC FPGA Software Development, SoC FPGA HPS Architecture, HPS SoC Boot and Configuration, Operating Systems
444 Discussions

Any Deep-Sleep modes and wake-on-LAN capabilities for Stratix 10 Architecture?

JChew5
Beginner
525 Views

Hello Intel Support Forums,

 

I am very new to Intel's SoC embedded solutions, I have been researching power solutions for the Stratix 10 architecture. I have reviewed the power management user guide which discusses the VID controller and power reduction techniques, etc. I was not able to come across deep sleep modes for the arm cores and ability to implement wake up sequences for the Stratix 10. Is there such capability?

 

Looking forward to responses,

Thank you.

 

0 Kudos
2 Replies
EBERLAZARE_I_Intel
452 Views

Hello,

 

Unfortunately we do not have any example design to guide/help on deep-sleep modes and wake-on LAN on our Stratix 10.

 

However, Wake-on LAN is available in our Triple Speed Ethernet IP, you may refer for more information here:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_ethernet.pdf#page=23

 

0 Kudos
EBERLAZARE_I_Intel
452 Views

Hi,

 

Do you have any followup questions?

0 Kudos
Reply