Contents of hps debug sof file

[anrfpga]

Hi All,

I am following this link to build a bootloader for bare metal application and trying to understand some of the steps involved.

1. What are the contents of the ghrd_agfb014r24b2e2v_hps_debug.sof file? Does it contain the full FPGA bitstream in it or does it only have the basic hardware required by the HPS?
2. Is the _hps_debug.sof file only for debugging the HPS u-boot? If yes, how do I program the FPGA with full FPGA bitstream?

Regards

Nikhil

[aikeu]

Hi anrfpga,

I may not fully understand your question.

To have a basic hardware configuration, you can flash in the ghrd from:

https://releases.rocketboards.org/ghrd_release/cyclonev/

The debug.sof file is an example of how you going to perform debug from the building bootloader document.

It will depends on what application that you intend to work with your fpga design and debug on your bare metal application.

Thanks.

Regards,

Aik Eu

[anrfpga]

Hi Aik Eu,

I understand that the GHRD contains the basic hardware. My doubt is coming from the size of two .sof files. The size of .sof generated by compiling the GHRD in quartus is around 250 Mb while the same file after adding the .hex file is around 3 Mb (_hps_debug.sof).

So, does the _hps_debug.sof file contain all the bitstream information that is present in the first .sof file or does it only have the HPS related information in it that is enough for debugging HPS?

[aikeu]

Hi anrfpga,

I cant be sure about the size different considering both sof files.

I think use the GHRD sof file will be better if you wanto check those basic hardware configuration as the default U-boot is built considering the GHRD provided.

Try to check out the status in the debugging mode and verify any status which change during run time. It will be better if you have idea of what you going to debug.

Thanks.

Regards,

AiK Eu

[aikeu]

Hi anrfpga,

I will close this thread if no further question.

Thanks.

Regards,

Aik Eu