Intel® SoC FPGA Embedded Development Suite
Support for SoC FPGA Software Development, SoC FPGA HPS Architecture, HPS SoC Boot and Configuration, Operating Systems
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
305 Discussions

Cyclone V SOC EMAC TX Clk Problem In Linux Kernel 4.x/5.x

BSHAN
Beginner
288 Views

Hi All,

We have board designed with Cyclone V SOC and EMAC0 is being used for ethernet interface with RGMII-ID interface .Ethernet interface is working fine with Linux kernel 3.10.I have upgraded linux kernel to 4.x or 5.x where stmmac device drivers are updated. Here I have problem in the communication. Etherent Phy chip is deteced and link is also up. But when I try to ping there was no communication. Data link led also blinks in the phy chip. Then I probed the emac tx clock which is connected to phy chip. Its always 250MHz irrespective of the link speed. But its suppose to be 125/25/2.5 MHz for 1000/100/10 Mbps respectively.

Where could be the problem, Do i miss any settings. Can anyone please help on this issue?
I am using TI DP83867 Phy chip.

0 Kudos
1 Reply
EBERLAZARE_I_Intel
271 Views

Hi,

 

You could check how the device tree is between the two kernels, to see if they are any difference between them.

 

If they are, then you might need to change the config of the device tree accordingly.

Reply