How to access the 8GB ram of DDR in Agilex 7

[Gokulraj]

Hi,

I need to access  8GB DDR ram in agilex dev kit,but now i able to access only 2GB ram.While trying to access the remaining 6GB of ram ot throw error as "TFTP error: trying to overwrite reserved memory...".

I have tried to access the remaining 6GB of ram by changing memory address in .dtb file,but same issue continues.

Thanks

M Gokulraj

[AdzimZM_Intel]

Hi M Gokulraj,

Have you check on this KDB before? https://www.intel.com/content/www/us/en/support/programmable/articles/000090295.html

You may try the workaround if you haven't test that yet.

Regards,

Adzim

[Gokulraj]

Hi AdzimZM,

I tried this already.Nothing happened,throws same error  "TFTP error: trying to overwrite reserved memory...".

Thanks,

M Gokulraj

[JingyangTeh]

Hi

Could you share me the full logs that you are testing with so that I could understand better.

Please also include the dmesg logs too.

Regards

Jingyang, Teh

[JingyangTeh]

Hi

Do you have any update on this case?

Could you share me your command on which address you are writing to? and device tree?

Regards

Jingyang, Teh

[Gokulraj]

Hi,

still the error not resolved and i doubt,memory region mapping is not the issue.While using bdinfo command in u-boot terminal it clearly shows the mapped 8gb of address,but the issue is only 2GB is effective remaining 6GB is reserved.Refer the below log.

bdinfo log

"

lmb_dump_all:
 memory.cnt = 0x2 / max = 0x10
 memory[0]    [0x0-0x7fffffff], 0x80000000 bytes flags: 0 ( 2GB )
 memory[1]    [0x280000000-0x3ffffffff], 0x180000000 bytes flags: 0 ( 6GB )
 reserved.cnt = 0x4 / max = 0x10
 reserved[0]    [0x0-0x1ffffff], 0x02000000 bytes flags: 4
 reserved[1]    [0x7eb08000-0x7fffffff], 0x014f8000 bytes flags: 0
 reserved[2]    [0x7fb0e940-0x7fffffff], 0x004f16c0 bytes flags: 0
 reserved[3]    [0x280000000-0x3ffffffff], 0x180000000 bytes flags: 0 ( Reserved 6GB )

"

2.Checked the serial console while running the u-boot,which mentioned DDR : 8192 MiB but DRAM:  2 GiB (effective 8 GiB)

u-boot serial console log

"

U-Boot SPL 2024.07-36773-g0dad0a0a478-dirty (Feb 11 2025 - 12:14:33 +0530)
Reset state: Cold
MPU          1350000 kHz
L4 Main          400000 kHz
L4 sys free   100000 kHz
L4 MP         200000 kHz
L4 SP         100000 kHz
SDMMC          50000 kHz
DDR: 8192 MiB
SDRAM-ECC: Initialized success with 13735 ms
QSPI: Reference clock at 400000 kHz
WDT:   Started watchdog@ffd00200 with servicing every 1000ms (10s timeout)
Trying to boot from MMC1
## Checking hash(es) for config board-0 ... OK
## Checking hash(es) for Image atf ... crc32+ OK
## Checking hash(es) for Image uboot ... crc32+ OK
## Checking hash(es) for Image fdt-0 ... crc32+ OK
NOTICE:  BL31: v2.10.0    (release):
NOTICE:  BL31: Built : 14:42:42, Dec 19 2024


U-Boot 2023.10 (Dec 24 2024 - 15:22:57 +0530)socfpga_agilex

CPU:   Intel FPGA SoCFPGA Platform (ARMv8 64bit Cortex-A53)
Model: SoCFPGA Agilex SoCDK
DRAM:  2 GiB (effective 8 GiB)
Core:  27 devices, 22 uclasses, devicetree: separate
WDT:   Started watchdog@ffd00200 with servicing every 1000ms (10s timeout)
MMC:   dwmmc0@ff808000: 0
Loading Environment from FAT... Unable to read "uboot.env" from mmc0:1...
In:    serial0@ffc02000
Out:   serial0@ffc02000
Err:   serial0@ffc02000
Net:   
Warning: ethernet@ff804000 (eth0) using random MAC address - 1a:8f:6a:b4:eb:81
eth0: ethernet@ff804000
Hit any key to stop autoboot:  0

"

I have attached the serial console and bdinfo log image for your reference.

Thanks,

M Gokulraj

[JingyangTeh]

Hi

It seems like the uboot device tree was not update to map the whole 8Gb of the DRAM that you have installed.

Could you share your device tree in the forum?

I believe you could try changing the memory node to the follow:

(arch/arm/dts/socfpga_agilex7m_socdk-u-boot.dtsi)

reg = <0 0x00000000 0 0x80000000>,

<0x10 0x80000000 0x1 0x60000000>;

This should include the remaining 6 GB of your device.

Then once booted you could try accessing the address from 0x10 8000 0000 to 0x11 E000 0000

Regards

Jingyang, Teh

[Gokulraj]

Hi,

    Even after changing the device tree as you mentioned above.Same error occurs.

    Here in the u-boot dts file what ever the memory [1] region,it mapped as reserved area.

    Please take a look at the bdinfo log of updated device tree log.

bdinfo log

"

lmb_dump_all:
 memory.cnt = 0x2 / max = 0x10
 memory[0]    [0x0-0x7fffffff], 0x80000000 bytes flags: 0 ( 2GB )

 memory[1] [0x1080000000-0x11dfffffff], 0x160000000 bytes flags: 0

 reserved.cnt = 0x4 / max = 0x10
 reserved[0]    [0x0-0x1ffffff], 0x02000000 bytes flags: 4
 reserved[1]    [0x7eb08000-0x7fffffff], 0x014f8000 bytes flags: 0

 reserved[2] [0x1080000000-0x11dfffffff], 0x160000000 bytes flags: 0

"

I believe the issue is not memory mapping node,it is reserved area mapping. 

For your information,I am using Agilex 7soc not Agilex 7m and  I have shared the default .dts file for your reference. 

Thanks,

M Gokulraj

[JingyangTeh]

Hi

Sorry for the late reply.

Could you give me some more time on checking this?

There isn't a clear documentation on why the uboot only use 2GB and the rest was placed under reserve.

Will need to check with some colleague on this behavior.

I believe the full 8GB is accessible in the linux environment right?

This behavior only happens in uboot.

Regards

Jingyang, Teh

[Gokulraj]

Hi

No,8GB is not accessible in linux environment too.Here the condition is " 1. If u-boot can access 8GB then linux environment can access 8GB of RAM ,2. If u-boot can't access 8GB then linux environment will not access 8GB of RAM".

Refer u-boot-socfpga-socfpga_v2021.07 version.By using this u-boot version i'm able to access full sdram but unable to write in  emmc.

I have compared the files related to reserved memory and sdram with latest u-boot version but i have no clue were it is configured.It has lots of main files and include files.

Thanks,

M Gokulraj

[JingyangTeh]

Hi

Thanks for confirming the condition.

We tried that with the latest uboot branch of QPDS24.3.1_REL_GSRD_PR and we dont see the problem.

I see that the SPL and Uboot is of different version in your logs.

Could you try using the uboot branch QPDS24.3.1_REL_GSRD_PR?

I tried that and managed to access the remaining 6GB in reserve.

Regards

Jingyang, Teh

[Gokulraj]

Hi,

Could you share the reference or user  guide and download link for the uboot branch QPDS24.3.1_REL_GSRD_PR.

Thanks,

M Gokulraj

[Gokulraj]

Hi,

Can i know what kind of file do you used to write in DDR.

Do you transferred the file from DDR to mmc?

If transferred what kind of file you used and from which memory region you used.

Please confirm the above details ASAP.

Thanks,

M Gokulraj

[JingyangTeh]

Hi

Sorry for the late reply.

It seems like a valid problem withe memory management.

At first i just tried out the md command to access the memory.

It seems like it is happening only in TFTP.

Could you try out the patch below and try it out.

I followed the steps here :

https://altera-fpga.github.io/rel-24.3.1/embedded-designs/agilex-7/f-series/soc/gsrd/ug-gsrd-agx7f-soc/

Regards

Jingyang, Teh

[JingyangTeh]

Hi

Is the patch working on your end?

Are you able to tftp to the above 2GB of memory region with the patch?

Regards

Jingyang, Teh

[Gokulraj]

Hi,

The patch doesn't  work,but i managed to write data in the reserved memory memory[1] region.

And now I stuck in another issue " mmc blocks written = error"

I have attached the error log image and configured load address as 0x280000000.

Thanks,

M Gokulraj