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U-Boot Failure using Terasic Ubuntu Image

서박사
New Contributor I
608 Views

Hello,

I'm opening a new thread to make a new question, but I think this is quite related to my prior question.

I'm trying to use Ubuntu OS at DE1-SoC board, through HPS.

So I tried to use the image from Terasic download center (https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=836&PartNo=4) and it worked for me for the last few months.

However recently, I cannot boot the device properly so I tried to use the zImage file from gsrd (https://releases.rocketboards.org/release/2020.07/gsrd/cv_gsrd/) and that worked for me, just for running OS.

Using the zImage from gsrd, the C program containing altera functions failed with freezing and I made another thread for the case above.

So my question is...

1) Is there any possible reason why the FPGA using the image from Terasic fails to boot?

2) I found that the image from gsrd does not contain arm-linux-gnueabihf-gcc command, which is a compiler. Should I rebuild the kernel to contain a such compiler within the OS?

 

Thank you for reading these discursive questions.

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1 Solution
IntelSupport
Community Manager
408 Views

Hello 서박사,

 

I think that your problem has been fixed.

According to the another thread(Re:ALTERA function fails after execution at C program

), your Linux was booted.

So I will close this thread if no further questions from you.

 

Best regards,

 Yoshiaki Saito


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6 Replies
YoshiakiS_Intel
Employee
545 Views

Hello 서박사,

 

Please see my answer below.

 

Q1) Is there any possible reason why the FPGA using the image from Terasic fails to boot?

A1) Did you try the following image on new SD-CARD?

https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=836&PartNo=4

Could you please share the boot log with us?

 

Q2) I found that the image from gsrd does not contain arm-linux-gnueabihf-gcc command, which is a compiler. Should I rebuild the kernel to contain a such compiler within the OS?

A2) You need to rebuild the root file system including many tools. But we recommend to compile a software on host PC using the cross compiler because SD-CARD is not highly durable basically. If you still want to compile a software on target OS, you should choose high grade SD-CARD.

 

Best regards,

 Yoshiaki Saito

서박사
New Contributor I
514 Views

Hello Yoshiaki,

 

Thank you for your prompt response. For the booting log, please refer to the following logs:


U-Boot SPL 2013.01.01 (Oct 12 2016 - 10:38:03)
BOARD : Altera SOCFPGA Cyclone V Board
CLOCK: EOSC1 clock 25000 KHz
CLOCK: EOSC2 clock 25000 KHz
CLOCK: F2S_SDR_REF clock 0 KHz
CLOCK: F2S_PER_REF clock 0 KHz
CLOCK: MPU clock 925 MHz
CLOCK: DDR clock 400 MHz
CLOCK: UART clock 100000 KHz
CLOCK: MMC clock 50000 KHz
CLOCK: QSPI clock 3613 KHz
RESET: COLD
INFO : Watchdog enabled
SDRAM: Initializing MMR registers
SDRAM: Calibrating PHY
SEQ.C: Preparing to start memory calibration
SEQ.C: CALIBRATION PASSED
SDRAM: 1024 MiB
ALTERA DWMMC: 0


U-Boot 2013.01.01 (Oct 12 2016 - 10:40:34)

CPU : Altera SOCFPGA Platform
BOARD : Altera SOCFPGA Cyclone V Board
I2C: ready
DRAM: 1 GiB
MMC: ALTERA DWMMC: 0
*** Warning - bad CRC, using default environment

In: serial
Out: serial
Err: serial
Skipped ethaddr assignment due to invalid EMAC address in EEPROM
Net: mii0
Warning: failed to set MAC address

Hit any key to stop autoboot: 0
reading u-boot.scr
200 bytes read in 4 ms (48.8 KiB/s)
## Executing script at 02000000
reading soc_system.rbf
7007184 bytes read in 327 ms (20.4 MiB/s)
## Starting application at 0x3FF795A4 ...
## Application terminated, rc = 0x0
reading zImage
5538512 bytes read in 257 ms (20.6 MiB/s)
reading socfpga.dtb
31245 bytes read in 6 ms (5 MiB/s)
## Flattened Device Tree blob at 00000100
Booting using the fdt blob at 0x00000100
reserving fdt memory region: addr=0 size=1000
Loading Device Tree to 03ff5000, end 03fffa0c ... OK

Starting kernel ...

 

 

 

This log has been gathered from the terminal through serial communication.

After printing "Starting kernel...", the terminal does not respond anymore.

However, I think that these logs are not sufficient to find the issue...

 

Thank you!

YoshiakiS_Intel
Employee
504 Views

Hello  서박,

 

I have been similar experience with wrong DTB.

Please check DTS(DTB) first.

 

Best regards,

 Yoshiaki Saito

서박사
New Contributor I
498 Views

Hello Yoshiaki!

 

Thank you for the prompt answer.

I've tried to replace DTB file from GHRD and I think it worked for me to boot the device.

Also, replacing zImage file from GHRD also worked.

However, although the device has been booted successfully, I cannot run any program using Altera function.

I've opened an individual thread for this issue a few days ago, so I would not ask you for the aforementioned issue here.

I'm still confused why the DTB file from the reference image (https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=836&PartNo=4) is wrong.

For this, is there any method to check if the DTB file is "proper"?

(I don't think DTB and zImage are related to each other, but DTB and .rbf file are related together)

IntelSupport
Community Manager
409 Views

Hello 서박사,

 

I think that your problem has been fixed.

According to the another thread(Re:ALTERA function fails after execution at C program

), your Linux was booted.

So I will close this thread if no further questions from you.

 

Best regards,

 Yoshiaki Saito


IntelSupport
Community Manager
397 Views

Hello 서박사,

 

I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.

Thank you.


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