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preloader make error

ScottShin
New Contributor I
579 Views

I'm trying to do this tutarial

(Host PC: win10  quartus:16.0 SoC EDS:16.0 Developboard:DE10-NANO)

https://bitlog.it/20170820_building_embedded_linux_for_the_terasic_de10-nano.html

when I'm doing "preloader " type "make"

at first i got  

*****************************LOG*****************************************************************

tar zxf /cygdrive/c/altera/15.0/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz

tar: Error opening archive: Failed to open '/cygdrive/c/altera/15.0/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz' 

make: *** [uboot-socfpga/.untar] Error 1

**********************************************************************************************************

I solved it by looked,

 https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base...

but now I have  problem below:

**************************LOG*********************************************************

user@DESKTOP-02SRNTM /cygdrive/e/teacher/FPGA/Offitial/DE10-NanoCD/Demonstrations/SoC_FPGA/DE10_NANO_SoC_GHRD/software/spl_bsp
$ make
C:/altera/16.0/embedded/host_tools/cygwin/bin/tar zxf /cygdrive/c/altera/16.0/embedded/host_tools/altera/preloader/uboot-socfpga.tar.gz
‘generated/build.h’ -> ‘uboot-socfpga/board/altera/socfpga/build.h’
‘generated/iocsr_config_cyclone5.c’ -> ‘uboot-socfpga/board/altera/socfpga/iocsr_config_cyclone5.c’
‘generated/iocsr_config_cyclone5.h’ -> ‘uboot-socfpga/board/altera/socfpga/iocsr_config_cyclone5.h’
‘generated/reset_config.h’ -> ‘uboot-socfpga/board/altera/socfpga/reset_config.h’
‘generated/pll_config.h’ -> ‘uboot-socfpga/board/altera/socfpga/pll_config.h’
‘generated/pinmux_config_cyclone5.c’ -> ‘uboot-socfpga/board/altera/socfpga/pinmux_config_cyclone5.c’
‘generated/pinmux_config.h’ -> ‘uboot-socfpga/board/altera/socfpga/pinmux_config.h’
‘generated/sdram/sdram_config.h’ -> ‘uboot-socfpga/board/altera/socfpga/sdram/sdram_config.h’
‘../../hps_isw_handoff/soc_system_hps_0/alt_types.h’ -> ‘uboot-socfpga/board/altera/socfpga/sdram/alt_types.h’
‘../../hps_isw_handoff/soc_system_hps_0/sdram_io.h’ -> ‘uboot-socfpga/board/altera/socfpga/sdram/sdram_io.h’
‘../../hps_isw_handoff/soc_system_hps_0/sequencer_auto_ac_init.c’ -> ‘uboot-socfpga/board/altera/socfpga/sdram/sequencer_auto_ac_init.c’
‘../../hps_isw_handoff/soc_system_hps_0/sequencer_auto.h’ -> ‘uboot-socfpga/board/altera/socfpga/sdram/sequencer_auto.h’
‘../../hps_isw_handoff/soc_system_hps_0/sequencer_auto_inst_init.c’ -> ‘uboot-socfpga/board/altera/socfpga/sdram/sequencer_auto_inst_init.c’
‘../../hps_isw_handoff/soc_system_hps_0/sequencer.c’ -> ‘uboot-socfpga/board/altera/socfpga/sdram/sequencer.c’
‘../../hps_isw_handoff/soc_system_hps_0/sequencer_defines.h’ -> ‘uboot-socfpga/board/altera/socfpga/sdram/sequencer_defines.h’
‘../../hps_isw_handoff/soc_system_hps_0/sequencer.h’ -> ‘uboot-socfpga/board/altera/socfpga/sdram/sequencer.h’
‘../../hps_isw_handoff/soc_system_hps_0/system.h’ -> ‘uboot-socfpga/board/altera/socfpga/sdram/system.h’
‘../../hps_isw_handoff/soc_system_hps_0/tclrpt.c’ -> ‘uboot-socfpga/board/altera/socfpga/sdram/tclrpt.c’
‘../../hps_isw_handoff/soc_system_hps_0/tclrpt.h’ -> ‘uboot-socfpga/board/altera/socfpga/sdram/tclrpt.h’
Applying Patch: C:/altera/16.0/embedded/host_tools/altera/preloader/uboot-socfpga.patch/cygwin/add_fms_extensions_cflag.patch
patch -p1 --directory=uboot-socfpga --input=C:/altera/16.0/embedded/host_tools/altera/preloader/uboot-socfpga.patch/cygwin/add_fms_extensions_cflag.patch
(Stripping trailing CRs from patch; use --binary to disable.)
patching file config.mk
Applying Patch: C:/altera/16.0/embedded/host_tools/altera/preloader/uboot-socfpga.patch/cygwin/apply_mingw_support.patch
patch -p1 --directory=uboot-socfpga --input=C:/altera/16.0/embedded/host_tools/altera/preloader/uboot-socfpga.patch/cygwin/apply_mingw_support.patch
(Stripping trailing CRs from patch; use --binary to disable.)
patching file tools/mkenvimage.c
Applying Patch: C:/altera/16.0/embedded/host_tools/altera/preloader/uboot-socfpga.patch/cygwin/build_system_cygpath_repair.patch
patch -p1 --directory=uboot-socfpga --input=C:/altera/16.0/embedded/host_tools/altera/preloader/uboot-socfpga.patch/cygwin/build_system_cygpath_repair.patch
(Stripping trailing CRs from patch; use --binary to disable.)
patching file Makefile
Hunk #1 succeeded at 682 (offset 56 lines).
patch: **** Failed to set the timestamps of file Makefile.orig : No such file or directory
Makefile:297: recipe for target 'uboot-socfpga/.applypatch.build_system_cygpath_repair' failed
make: *** [uboot-socfpga/.applypatch.build_system_cygpath_repair] Error 2

***********************************************************************************************************

any help will be appreciate.

0 Kudos
1 Solution
EBERLAZARE_I_Intel
568 Views

Hi,

Most user usually refer to Rocketboards guide on the booting which has multiple topics on generating and compiling hardware design, preloader and u-boot etc. You may start here:

https://rocketboards.org/foswiki/Documentation/GSRDPreloader

Also, I am seeing that you are working on Quartus ver 15.0? That is pretty old, I recommended that you refer to above link and follow the guide. And use the 18.1 std version of Quartus and SoC EDS at least.

Let me know if you are still having trouble after following above guide or any questions.

View solution in original post

3 Replies
EBERLAZARE_I_Intel
569 Views

Hi,

Most user usually refer to Rocketboards guide on the booting which has multiple topics on generating and compiling hardware design, preloader and u-boot etc. You may start here:

https://rocketboards.org/foswiki/Documentation/GSRDPreloader

Also, I am seeing that you are working on Quartus ver 15.0? That is pretty old, I recommended that you refer to above link and follow the guide. And use the 18.1 std version of Quartus and SoC EDS at least.

Let me know if you are still having trouble after following above guide or any questions.

ScottShin
New Contributor I
555 Views

thanks, I fix the problem. I unstalled Quartus and soc EDS16.0, then install Quartus18.1 and SoC EDS18.0.

EBERLAZARE_I_Intel
548 Views

Hi,

I am glad your issue is fixed, if you have any further questions on other topics , feel free to file a new case/question.

 

Reply