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AAhma10
Novice
222 Views

SGXv2 Page Fault Handling

Hi,

As far as I've been able to deduce from the programming reference, SGXv2 will allow the dynamic mapping of pages which is currently unsupported. However, I was wondering if page fault handling in SGXv2 is also different from SGXv1 e.g., can the enclave program learn about the page faults? etc.

Thanks!

Adil

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Prabu_R_Intel
Employee
222 Views

An enclave can request additional pages via EAUG - this is only supported in SGXv2, for which no hardware is currently available.
The OS could swap out EPC pages to regular RAM (EWB/ELD instructions), but Windows does not currently support this

The EPC size is limited on current systems to roughly 90MB.Windows does not currently support swapping out these pages. An enclave must
request all pages it wishes to use before executing (EINIT) on SGXv1 hardware. The size of all enclaves must not exceed the EPC size
Intel reserves some EPC space for their management enclaves (quoting, provisioning, loading enclaves)
So your enclave will have to use well below 90MB of heap size on current hardware.
Future SGX hardware will allow dynamic page allocation, allowing dynamic enclave sizes.

AAhma10
Novice
222 Views

Hi,

Thanks for the answer. But my question is specific to page fault handling. Will SGXv2 allow enclave processes to learn about which page has been faulted. SGXv1 switches context to the OS whenever a page fault happens. Will this change in SGXv2?

Adil

Prabu_R_Intel
Employee
222 Views

SGX v1 doesn't report page fault to enclave. If page fault occurs, SGX switches context to OS using AEX events.
But SGX V2 reports page fault to enclave. In SGX V2, the enclave  holds the information regarding the memory paging fault and general
 paging fault. So the upcoming SGX V2 will have provision to handle dynamic memory allocation inside the enclave.

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