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I wonder if the host controller has to be x86? Can it be other architecture such as MIPS or RISC-V?
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Hi,
For more details regarding the supported hardware, you can go through this link.
Meanwhile, We will let the concerned team know about these details.
Thanks for reporting the issue.
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Thanks. I look forward to your more details regarding supporting CPU architecture.
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Hi Frank,
The open oneAPI specifications at oneapi.com are designed to work on any CPU host and any accelerator.
However, the Intel beta products will only support Intel CPUs and accelerators. The open-source projects for the oneAPI elements (DPC++, libraries, and Level Zero) are available for use by anyone who wants to develop MIPS, RISC-V, or other implementations.
Let us know if it is helpful for you.
-Abhishek
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Thanks Abhishek. This is helfpul. I've also found the github source you shared in another thread. Thanks for that.
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Thank You, Frank
Can we close this thread?
You are always welcome to post a new thread if you have any problems.
-Abhishek

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