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My system has linux ubuntu 18.
CPU is Intel® Xeon(R) Silver 4215 CPU @ 2.50GHz × 16 (cascade lake) with two nvidia gpus.
sudo lshw -numeric -C display
*-display
description: VGA compatible controller
product: TU102 [TITAN RTX] [10DE:1E02]
vendor: NVIDIA Corporation [10DE]
physical id: 0
bus info: pci@0000:17:00.0
version: a1
width: 64 bits
clock: 33MHz
capabilities: pm msi pciexpress vga_controller bus_master cap_list rom
configuration: driver=nvidia latency=0
resources: iomemory:38000-37fff iomemory:38000-37fff irq:94 memory:91000000-91ffffff memory:380060000000-38006fffffff memory:380070000000-380071ffffff ioport:7000(size=128) memory:92000000-9207ffff
*-display
description: VGA compatible controller
product: GP107GL [Quadro P400] [10DE:1CB3]
vendor: NVIDIA Corporation [10DE]
physical id: 0
bus info: pci@0000:b3:00.0
version: a1
width: 64 bits
clock: 33MHz
capabilities: pm msi pciexpress vga_controller bus_master cap_list rom
configuration: driver=nvidia latency=0
resources: irq:93 memory:fa000000-faffffff memory:e0000000-efffffff memory:f0000000-f1ffffff ioport:f000(size=128) memory:fb000000-fb07ffff
When I run the following code,
#include<CL/sycl.hpp> #include<iostream> #include<vector> #include<string> using namespace cl::sycl; int main(int argc, char *argv[]){ std::vector<device> filtered_device_list; int index=0; auto platformlist = platform::get_platforms(); for(auto p : platformlist) { decltype(p.get_devices(info::device_type::all)) devicelist; devicelist = p.get_devices(info::device_type::all); for(auto d : devicelist) { std::string device_vendor = d.get_info<info::device::vendor>(); std::cout<<d.get_info<info::device::name>()<<"\n"; } } return 0; }
the outputs are
Intel(R) FPGA Emulation Device
Intel(R) Xeon(R) Silver 4215 CPU @ 2.50GHz
SYCL host device
OneAPI doesn't work on NvidiaGPUs at this moment.
So these are all devices available for DPC++. I can use only
cpu_selector selector;
default_selector selector;
host_selector selector;
Any advantages of using DPC++ on Cascade lake cpu? How does it make faster?
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Hi,
As per the link below, Intel® Xeon(R) Silver 4215 CPU does not have an integrated graphics card(iGPU).
However, you can optimize your code using AOT compilation with CPU target instruction set(SSE,AVX,AVX512 etc).
--Rahul
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Hi Nyan,
Since you know the target device(Intel Xeon with Cascade lake in this case) beforehand, that you'd be targeting, it is advisable to use Ahead of Time(AOT) compilation, which provides the following benefits:
- No additional compilation time is done when running your application.
- No just-in-time (JIT) bugs encountered due to compilation for the target device since this step is skipped with AOT compilation.
- Your final code executing on the target device can be tested as is before you deliver it to end-users.
Note: Data Parallel C++ (DPC++) supports AOT compilation for the following targets: Intel® CPUs, Intel® Processor Graphics Gen9 or above, and Intel® FPGA.
Command to invoke AOT compilation:
//Linux: dpcpp -c main.cpp dpcpp -fsycl-targets=spir64_x86_64-unknown-unknown-sycldevice -Xsycl-target-backend "-march=avx2" mandel.cpp main.o
For more information, refer to this link below:
--Rahul
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Intel Xeon with Cascade lake doesn't have internal GPU like other CPU, HD Graphics 630, for example?
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Hi,
As per the link below, Intel® Xeon(R) Silver 4215 CPU does not have an integrated graphics card(iGPU).
However, you can optimize your code using AOT compilation with CPU target instruction set(SSE,AVX,AVX512 etc).
--Rahul
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Thank you
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You're welcome, Nyan. Let us know if we can close the thread
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yes thank you.
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Thanks for the confirmation.

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