Some questions about intel oneAPI slides

[leilag]

Hello Intel oneAPI devs,

I have been going through any slides I see from Intel about oneAPI toolkit and I am confused about a couple of things.

1- In almost all of there there is a slide titled "ONEAPI FOR CROSS-ARCHITECTURE PERFORMANCE".  The part of the schematic which is called "Optimized Middleware & Frameworks" is not clear for me. What is it referring to?

2- In the same figure, there is a hardware architecture called "AI (future)". How can I understand this one? It is sometimes called "other accelerators" in some of those slides.

3- Looking through the execution model in kernels (especially the basic ones and the explicit ND-range kernels), I see "id" class and "item" class. I don't quite understand the difference! Is this understanding correct that "item" is referring to the indexing of the individual kernel in the work group but "id" gives the global position of the same individual?

4- Is there a link/doc where I can see what architectures DPC++ supports.

Thank you in advance,

Leila

[MRajesh_intel]

Hi,

Thanks for posting your query.

We will get back to you regarding points 1 & 2.

>>I see "id" class and "item" class. I don't quite understand the difference

Please refer to the links provided for your information.

For sycl::item :https://docs.oneapi.com/versions/latest/dpcpp/iface/item.html

For sycl::id :https://docs.oneapi.com/versions/latest/dpcpp/iface/id.html#id

>> Is there a link/doc where I can see what architectures DPC++ supports ?

Please refer to this link: https://software.intel.com/content/www/us/en/develop/articles/intel-oneapi-dpcpp-system-requirements.html

Regards

Rajesh.

[MRajesh_intel]

Hi,

>>I have been going through any slides I see from Intel about oneAPI toolkit.

Could you please share the slides or links where you have visited the information in points 1 & 2?

Regards

Rajesh.

[leilag]

Hello Rajesh,

Thanks for your response! It was helpful.

Slide 5 of "Webinar-Slides-DPC-Part-1-An-Introduction-to-the-New-Programming-Model-.pdf" says "AI"  and page 4 of "FPGA.pdf" says "Other accelerators". Both slides have "Middlewares and Frameworks".

Thanks,

Leila

[Kent_M_Intel]

Hi Leila, thanks for your question.  Today the Intel oneAPI toolkits support CPUs, GPUs, and FPGAs so that's what we show on slides describing the current version of the tools.  On other slides where we're focusing on the oneAPI programming model and the industry standards initiative we include either "AI accelerators" or "Other future accelerators" because the programming model was developed with other architectures in mind as well. We've already seen one other company in the industry, Huawei, announce that they developed a DPC++ compiler for their Ascend 2 AI architecture.

[Subarnarek_G_Intel]

Examples of optimized middleware and frameworks include Tensorflow, PyTorch, and XGBoost. It’s a general category for software layers between the near hardware level of oneAPI and customer applications at the top of the stack. Some applications are developed directly with oneAPI as well so, depending on the application, it may or may not have a middleware layer. 

[leilag]

Thanks everyone for your answers. Things are clear now.