cant generate LLVM IR using dpcpp

[DavidLivshin]

doing

  dpcpp -emit-llvm -o x.ll -S x.cpp

generates:

  error: IR output is not supported.

Setting

  export IGC_DumpLLVMIR=1

( as suggested in one of the posts ) doesn't help.

Thank you,

David

[VarshaS_Intel]

Hi,

Thanks for reaching out to us.

Could you please try using the below command for generating the LLVM IR using dpcpp

dpcpp -emit-llvm -fsycl-device-only -o x.ll sample.cpp

We have tried using the attached sample vector add program using the latest Intel oneAPI(2022.0) and we are able to generate LLVM IR code. Please find the below screenshot for more information.

Could you please try and let us know if your issue resolves? If not, could you please provide us with the OS details, Intel DPCPP version along with the sample reproducer code?

Thanks & Regards,

Varsha 

[DavidLivshin]

Hi Varsha

Thank you for your advice - adding '--fsycl-device-only' indeed generate llvm IR file.

However the file is wrong. Compiling the following simple program ( x.c )

void foo( double *a, double *b, double *c, double d, unsigned int cnt )
{
unsigned int i;

for ( i = 0; i < cnt; i++ )
{
c[i] = a[i] + b[i];
}
}

generated the attached IR file x.ll ( inside x.zip ).

Performing llvm-dis on this file shows that this IR file doesn't have any code included:

; ModuleID = 'x.ll'
source_filename = "x.c"
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
target triple = "spir64-unknown-unknown"

!llvm.module.flags = !{!0, !1}
!opencl.spir.version = !{!2}
!spirv.Source = !{!3}
!opencl.used.extensions = !{!4}
!opencl.used.optional.core.features = !{!4}
!opencl.compiler.options = !{!4}
!llvm.ident = !{!5}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"frame-pointer", i32 2}
!2 = !{i32 1, i32 2}
!3 = !{i32 4, i32 100000}
!4 = !{}
!5 = !{!"Intel(R) oneAPI DPC++/C++ Compiler 2022.0.0 (2022.0.0.20211123)"}

Also, it seems that compiler generates bit-code output. Is there a way to generate llvm assembly file ( the way clang does )?

Thank you,

David

[Roin]

Hi Varsha,

With your command, it generates a bitcode file (I believe). And when I use llvm-dis to convert the bitcode file, it shows: 
llvm-dis: error: Unknown attribute kind (70) (Producer: 'Intel.oneAPI.DPCPP.Compiler_2022.0.0' Reader: 'LLVM 10.0.1')
Any suggestions?

Thanks,

Robin

[VarshaS_Intel]

Hi,

>>Is there a way to generate llvm assembly file ( the way clang does )?

To generate the assembly file could you please use the below command:

dpcpp -S -o vector.s vectoradd.cpp

For more information, please find the below link:

https://www.intel.com/content/www/us/en/develop/documentation/oneapi-dpcpp-cpp-compiler-dev-guide-and-reference/top/compiler-setup/using-the-command-line/specifying-assembly-files.html

Thanks & Regards,

Varsha

[DavidLivshin]

The question was ( and still is ) about generating LLVM assembly - .ll or .bc files.

The way you suggested is indeed generates such a file, but file only without any code in it - see my previous reply.

Regards,

David

[VarshaS_Intel]

Hi,

Could you please find the below steps to generate the LLVM IR file:

export IGC_ShaderDumpEnable=1
export IGC_DumpToCurrentDir=1
dpcpp <project_name>.cpp
./a.out

Could you please find the below screenshot for more information?

Thanks & Regards,

Varsha

[VarshaS_Intel]

Hi,

We haven't heard back from you. Could you please provide an update on your issue?

Thanks & Regards,

Varsha

[DavidLivshin]

See my reply from 02-21-2022.

The problem is real and instead of providing useless answers it would be better to report it to the relevant people with the hope that they will promptly fix it.

[Klaus-Dieter_O_Intel]

Please try the following ahead-of-time compilation:

export IGC_DumpLLVMIR=1

ALLDEVICES="bdw skl kbl cfl bxt glk icllp lkf ehl tgllp rkl adls gen8 gen9 gen11 gen12LP"

for DEVICE in $ALLDEVICES; do

  export IGC_DumpToCustomDir=dumpIR_${DEVICE}

  dpcpp -fsycl-targets=spir64_gen -Xsycl-target-backend "-device $DEVICE" vector-add-usm.cpp

done

The available devices are reported as help information for flag "-device" by

ocloc compile --help

[Klaus-Dieter_O_Intel]

Please could you provide an update whether the issue was fixed using the previous advice, thanks.

[DavidLivshin]

Seems the same - the .ll files generated but they don't contain code. See attached for example:

x.c - file I compiled

OCL_asm06727ca488e47b71_codegen.ll - generated IR .ll file

x.ll - generated by clang

[Klaus-Dieter_O_Intel · Accepted solution]

Your code example does not include any SYCL offloading. The compiler driver (add flag "-v" to see the details) will compile for offloading and the host. You have to signal non-SYCL compilation explicitly with "-fno-sycl" to get the IR. Alternatively you can use the host-only compiler drivers "icpx" or "icx". Please try one of the following commands to create LLVM IR bitcode which is made human readable with llvm-dis as usual:

dpcpp -emit-llvm -flto -o x_dpcpp.bc -c x.c -fno-sycl

llvm-dis -o x_dpcpp.ll x_dpcpp.bc

icpx -emit-llvm -flto -o x_icpx.bc -c x.c

llvm-dis -o x_icpx.ll x_icpx.bc

icx -emit-llvm -flto -o x_icx.bc -c x.c

llvm-dis -o x_icx.ll x_icx.bc

You will get full control with the Intel clang++ (internally used by all compiler drivers dpcpp, icpx, icx). It is not in the default PATH to avoid clashes with standard clang installations:

export PATH=/opt/intel/oneapi/compiler/latest/linux/bin-llvm:$PATH

which clang++

clang++ -emit-llvm -flto -o x_clang++.bc -c x.c

llvm-dis -o x_clang++.ll x_clang++.bc