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I port tbb to mips64(linux 2.6.27.7),after compile,run the binarary,the result is that:
~ # /mnt/convex_hull_bench
Starting TBB unbufferred push_back version of QUICK HULL algorithm
Number of nodes:5000000 Number of threads:1 Initialization time: 41.6 Calculation time: 90.1
Number of nodes:5000000 Number of threads:2 Initialization time: 21 Calculation time: 45.6
Number of nodes:5000000 Number of threads:3 Initialization time: 14 Calculation time: 31
pure virtual method called
terminate called without an active exception
Segmentation fault
when i port tbb to mips64,i modify add the file as follow:
#ifndef __TBB_machine_H
#error Do not include this file directly; include tbb_machine.h instead
#endif
#include "linux_common.h"
#include
//#include
#define __TBB_WORDSIZE 8
#define __TBB_BIG_ENDIAN 1
#define __TBB_release_consistency_helper() __asm__ __volatile__("": : :"memory")
#ifndef __TBB_rel_acq_fence
inline void __TBB_rel_acq_fence() { __asm__ __volatile__("sync": : :"memory"); }
#endif
#define MIPS_SYNC sync
#define MIPS_SYNC_STR_2(X) #X
#define MIPS_SYNC_STR_1(X) MIPS_SYNC_STR_2(X)
#define MIPS_SYNC_STR MIPS_SYNC_STR_1(MIPS_SYNC)
#define MIPS_PUSH_MIPS2
#define __arch_compare_and_exchange_xxx_32_int(mem, newval, oldval, rel, acq) \\
__asm__ __volatile__ ( \\
".set push\\n\\t" \\
MIPS_PUSH_MIPS2 \\
rel "\\n" \\
"1:\\t" \\
"ll %0,%4\\n\\t" \\
"move %1,$0\\n\\t" \\
"bne %0,%2,2f\\n\\t" \\
"move %1,%3\\n\\t" \\
"sc %1,%4\\n\\t" \\
"beqz %1,1b\\n" \\
acq "\\n\\t" \\
".set pop\\n" \\
"2:\\n\\t" \\
: "=&r" (__prev), "=&r" (__cmp) \\
: "r" (oldval), "r" (newval), "m" (*mem) \\
: "memory")
#define __arch_compare_and_exchange_xxx_64_int(mem, newval, oldval, rel, acq) \\
__asm__ __volatile__ ("\\n" \\
".set push\\n\\t" \\
MIPS_PUSH_MIPS2 \\
rel "\\n" \\
"1:\\t" \\
"lld %0,%4\\n\\t" \\
"move %1,$0\\n\\t" \\
"bne %0,%2,2f\\n\\t" \\
"move %1,%3\\n\\t" \\
"scd %1,%4\\n\\t" \\
"beqz %1,1b\\n" \\
acq "\\n\\t" \\
".set pop\\n" \\
"2:\\n\\t" \\
: "=&r" (__prev), "=&r" (__cmp) \\
: "r" (oldval), "r" (newval), "m" (*mem) \\
: "memory")
#define __arch_compare_and_exchange_val_32_int(mem, new, old, rel, acq) \\
({ int32_t __prev; int __cmp; \\
__arch_compare_and_exchange_xxx_32_int(mem, new, old, rel, acq); \\
(int32_t)__prev; })
#define __arch_compare_and_exchange_val_64_int(mem, new, old, rel, acq) \\
({ int64_t __prev; int __cmp; \\
__arch_compare_and_exchange_xxx_64_int(mem, new, old, rel, acq); \\
(int64_t)__prev; })
#define __atomic_val_bysize_4(pre, post, mem, ...) \\
({ \\
int32_t __result; \\
__result = pre##_32_##post (mem, __VA_ARGS__); \\
__result; \\
})
#define __atomic_val_bysize_8(pre, post, mem, ...) \\
({ \\
int64_t __result; \\
__result = pre##_64_##post (mem, __VA_ARGS__); \\
__result; \\
})
#define __TBB_CompareAndSwap4(P,V,C) __atomic_val_bysize_4(__arch_compare_and_exchange_val, int,((int32_t *)P), (V), (C), "", MIPS_SYNC_STR)
#define __TBB_CompareAndSwap8(P,V,C) __atomic_val_bysize_8(__arch_compare_and_exchange_val, int,((int64_t *)P), (V), (C), "", MIPS_SYNC_STR)
#define __TBB_CompareAndSwapW(P,V,C) __atomic_val_bysize_8(__arch_compare_and_exchange_val, int,((int64_t *)P), (V), (C), "", MIPS_SYNC_STR)
where is the problems, thanks very much
~ # /mnt/convex_hull_bench
Starting TBB unbufferred push_back version of QUICK HULL algorithm
Number of nodes:5000000 Number of threads:1 Initialization time: 41.6 Calculation time: 90.1
Number of nodes:5000000 Number of threads:2 Initialization time: 21 Calculation time: 45.6
Number of nodes:5000000 Number of threads:3 Initialization time: 14 Calculation time: 31
pure virtual method called
terminate called without an active exception
Segmentation fault
when i port tbb to mips64,i modify add the file as follow:
#ifndef __TBB_machine_H
#error Do not include this file directly; include tbb_machine.h instead
#endif
#include "linux_common.h"
#include
//#include
#define __TBB_WORDSIZE 8
#define __TBB_BIG_ENDIAN 1
#define __TBB_release_consistency_helper() __asm__ __volatile__("": : :"memory")
#ifndef __TBB_rel_acq_fence
inline void __TBB_rel_acq_fence() { __asm__ __volatile__("sync": : :"memory"); }
#endif
#define MIPS_SYNC sync
#define MIPS_SYNC_STR_2(X) #X
#define MIPS_SYNC_STR_1(X) MIPS_SYNC_STR_2(X)
#define MIPS_SYNC_STR MIPS_SYNC_STR_1(MIPS_SYNC)
#define MIPS_PUSH_MIPS2
#define __arch_compare_and_exchange_xxx_32_int(mem, newval, oldval, rel, acq) \\
__asm__ __volatile__ ( \\
".set push\\n\\t" \\
MIPS_PUSH_MIPS2 \\
rel "\\n" \\
"1:\\t" \\
"ll %0,%4\\n\\t" \\
"move %1,$0\\n\\t" \\
"bne %0,%2,2f\\n\\t" \\
"move %1,%3\\n\\t" \\
"sc %1,%4\\n\\t" \\
"beqz %1,1b\\n" \\
acq "\\n\\t" \\
".set pop\\n" \\
"2:\\n\\t" \\
: "=&r" (__prev), "=&r" (__cmp) \\
: "r" (oldval), "r" (newval), "m" (*mem) \\
: "memory")
#define __arch_compare_and_exchange_xxx_64_int(mem, newval, oldval, rel, acq) \\
__asm__ __volatile__ ("\\n" \\
".set push\\n\\t" \\
MIPS_PUSH_MIPS2 \\
rel "\\n" \\
"1:\\t" \\
"lld %0,%4\\n\\t" \\
"move %1,$0\\n\\t" \\
"bne %0,%2,2f\\n\\t" \\
"move %1,%3\\n\\t" \\
"scd %1,%4\\n\\t" \\
"beqz %1,1b\\n" \\
acq "\\n\\t" \\
".set pop\\n" \\
"2:\\n\\t" \\
: "=&r" (__prev), "=&r" (__cmp) \\
: "r" (oldval), "r" (newval), "m" (*mem) \\
: "memory")
#define __arch_compare_and_exchange_val_32_int(mem, new, old, rel, acq) \\
({ int32_t __prev; int __cmp; \\
__arch_compare_and_exchange_xxx_32_int(mem, new, old, rel, acq); \\
(int32_t)__prev; })
#define __arch_compare_and_exchange_val_64_int(mem, new, old, rel, acq) \\
({ int64_t __prev; int __cmp; \\
__arch_compare_and_exchange_xxx_64_int(mem, new, old, rel, acq); \\
(int64_t)__prev; })
#define __atomic_val_bysize_4(pre, post, mem, ...) \\
({ \\
int32_t __result; \\
__result = pre##_32_##post (mem, __VA_ARGS__); \\
__result; \\
})
#define __atomic_val_bysize_8(pre, post, mem, ...) \\
({ \\
int64_t __result; \\
__result = pre##_64_##post (mem, __VA_ARGS__); \\
__result; \\
})
#define __TBB_CompareAndSwap4(P,V,C) __atomic_val_bysize_4(__arch_compare_and_exchange_val, int,((int32_t *)P), (V), (C), "", MIPS_SYNC_STR)
#define __TBB_CompareAndSwap8(P,V,C) __atomic_val_bysize_8(__arch_compare_and_exchange_val, int,((int64_t *)P), (V), (C), "", MIPS_SYNC_STR)
#define __TBB_CompareAndSwapW(P,V,C) __atomic_val_bysize_8(__arch_compare_and_exchange_val, int,((int64_t *)P), (V), (C), "", MIPS_SYNC_STR)
where is the problems, thanks very much
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