Apollo Lake SoC

[ssix]

Hi,

Could you please explain "x4 PCIe*2". What does it mean?

Thanks in advance.

[Jose_H_Intel1]

We are investigating your request.

[JHain1]

Would assume this means a interface that supports 4 lanes of PCIe Gen2 data.

[ssix]

4 lanes of PCIe Gen2 sounds like mockery in 2016.

Exceeded my worst expectations!

Thank you, OregonDude2U.

[exu1]

who have apollo lake brief to share? thanks in advance