pourquoi on ne peut pas augmenter la superficie des semis conducteurs

[aragon5956]

[FRA]
bonjour,

pourriez vous dire réellement et pourquoi, ne peut on pas augmenter, la superficie des puces ?

j'ai entendu dire que c'est pour des raisons de températures qui allaient augmenter encore, mais pour moi ce n'est pas une raison valable, car en on peut mettre des "ventirads" plus large.Ensuite, j'ai entendu dire qu'il pouvait y avoir des baisses de tension en fonction de la distance entre un point A, à gauche de la puce, et un point B, tout à droite, par exemple . Mais je n'y crois pas, car on pourrait mettre des amplificateurs de courant pour réaugmenter la tension . ect ,ect ...

Aussi, je ne peux pas renseigner de labels dans ce message !

Cordialement

Alexandre M

[ENG]

hello,

Could you really say and why, we can not increase the surface area of the chips?

I heard that it is for reasons of temperatures that will increase still, but for me this is not a valid reason, because we can put "ventirads" wider. Then I heard that there could be voltage drops depending on the distance between a point A, to the left of the chip, and a point B, to the right, for example. But I don’t believe it, because we could put in current amplifiers to raise the voltage again. etc.

Also, I can not fill labels in this message!

Cordially
Alexandre M



[DE]

hallo,

könnte man sagen, warum man die Fläche der Chips nicht vergrößern kann?

Ich habe gehört, dass es aus Gründen der Temperaturen noch steigen würde, aber für mich ist das kein triftiger Grund, denn man kann "ventirads" breiter setzen. Dann habe ich gehört, daß es je nach Entfernung zwischen einem A-Punkt links vom Chip und einem B-Punkt ganz rechts zum Beispiel zu Spannungsabfällen kommen kann. Aber ich glaube nicht daran, denn man könnte Stromverstärker einbauen, um die Spannung wieder zu erhöhen. ect ,ect ...

Außerdem kann ich in dieser Nachricht keine Labels angeben!

Herzlich
Alexandre M



[ITA]

buongiorno,

potreste dire realmente e perché, non si può aumentare, la superficie dei chip?

Ho sentito dire che è per ragioni di temperature che aumenteranno ancora, ma per me non è una ragione valida, perché si possono mettere "ventirads" più grandi. Poi ho sentito dire che ci possono essere cali di tensione a seconda della distanza tra un punto A, a sinistra del chip, e un punto B, a destra, per esempio . Ma io non ci credo, perché si potrebbe mettere amplificatori di corrente per aumentare la tensione . ect ,ect ...

Inoltre, non posso inserire etichette in questo messaggio!

Cordialmente
Alexandre M



[SPA]

buenos días,

podría usted decir realmente y por qué, no se puede aumentar, el área de los chips?

He oído que es por razones de temperaturas que van a aumentar aún más, pero para mí no es una razón válida, porque se puede poner "ventirads" más grandes. Luego oí que podía haber caídas de tensión en función de la distancia entre un punto A, a la izquierda del chip, y un punto B, a la derecha, por ejemplo . Pero yo no lo creo, porque podríamos poner amplificadores de corriente para volver a subir la tensión . ect ,etc ...

También, no puedo informar de etiquetas en este mensaje!

Cordialmente
Alexandre M

[jbruceyu]

The idea of increasing the surface area of the chips ("die size") seems intuitive to improve performance or add more transistors. However, there are several physical, technical, economic, and reliability limitations that make this approach unsustainable beyond a certain threshold. main reasons are: 1.) Manufacturing yield, the decisive factor -> The larger the chip, the more likely it is that a defect will occur during manufacturing. Silicon wafers contain microscopic imperfections. A larger chip covers a larger area, so it's more likely to be affected by a defect. This greatly reduces yield, increases unit cost, and makes manufacturing economically unviable. 2.) Signal propagation delay and power consumption -> On a very large chip, the signals have to travel longer distances. This causes: Propagation latencies (more nanoseconds to get from point A to B), Loss of synchronization (clocks must remain perfectly aligned), Increased energy consumption due to long interconnections, The idea of adding "buffers" is theoretically possible, but it adds complexity, consumes more power, generates more heat, and complicates the design. 3.) Heat dissipation -> Even with large "ventirads", the thermal problem is not only the amount of heat, but its density and distribution. A large chip heats up unevenly (hotspots), and it becomes very difficult to ensure homogeneous heat dissipation, even with active cooling. This can damage the chip locally. 4.) Physical limitations of silicon and packaging

Manufacturers are not trying to create a single giant chip, but rather to group several smaller chiplets on the same substrate with ultra-fast interconnects (like AMD with Infinity Fabric, or Intel Foveros/EMIB). This bypasses the limits while keeping modularity and reliability. In short, It's not that they don't want to increase the surface area of the chips, it's that beyond a certain point, it becomes impractical, inefficient and too expensive. Engineers are getting around this problem with modern approaches, such as multi-die architectures, which allow computing power to continue to increase without indefinitely expanding a single chip.

...hope it helps.

[aragon5956]

ok, can this video, can help to increase speed of semi-conductors ?

precisely 11:23 min in this video

https://www.youtube.com/watch?v=ys91jNGiAZk&t=14s&ab_channel=LivresetScience