Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12589 Discussions

A10 HPS not booting from micro SD card - NRST pulsing

Altera_Forum
Honored Contributor II
1,291 Views

Hello, 

 

I have a custom A10 prototype PCB, and I'm trying to bring up the HPS. I am building the preloader/uboot using the BSP-Editor and writing the output to a partition on a micro sdcard (same process I've done on the dev kit many times with success). I never get anything from the UART console output, so I'm attempting to debug what's happening. I have noticed the HPS_NRST signal is pulsing low continuously when there is a micro SD card installed (otherwise it stays HIGH all the time with no SD card plugged in). Any ideas on what is happening, or how to debug a preloader /u-boot that's not coming up initially? Can I get access to the HPS registers to see why it won't come up? 

 

Thanks!
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
424 Views

If the NRST is pulsing, it is probably caused by the Boot ROM not being able find a boot image, thus the watchdog will just wait and then issues a reset. If you have a JTAG connection, you can use a debugger (such as DS-5), loads the uboot directly onto the on-chip RAM (you can use the .ds script that was generated). If this is successful (meaning, uboot is able to run) you probably need to double check your hardware

0 Kudos
Altera_Forum
Honored Contributor II
424 Views

How are you getting uboot on the sdcard? I'm having trouble finding documentation for this, for my Alaric dev kit. I have the uboot binary image; I just need to put it in the sd card which already has root filesystem. 

thanks
0 Kudos
Altera_Forum
Honored Contributor II
424 Views

I am able to program my .sof file through JTAG and when SD card has the HPS related binary files(u-boot generated by BSP editor). I am able to see that HPS DDR is calibrated successfully.  

 

But when i convert the .sof into .rbf and load it along with the u boot files, my final state is 

 

emif_reset interrupt is acknowledged (appears 3 times) 

and hence HPS DDR calibration fails. 

 

How do I debug this issue?
0 Kudos
Altera_Forum
Honored Contributor II
424 Views

 

--- Quote Start ---  

I am able to program my .sof file through JTAG and when SD card has the HPS related binary files(u-boot generated by BSP editor). I am able to see that HPS DDR is calibrated successfully.  

 

But when i convert the .sof into .rbf and load it along with the u boot files, my final state is 

 

emif_reset interrupt is acknowledged (appears 3 times) 

and hence HPS DDR calibration fails. 

 

How do I debug this issue? 

--- Quote End ---  

 

 

Can you load the FPGA manually during uboot stage? 

We're still trying to get uboot to come up. We have a non-standard uboot process which works when we put it on the dev kit QSPI, but so far hasn't worked when putting it on the sd card.
0 Kudos
Reply