Altera SoC FPGA programming Environment

Nios® V/II Embedded Design Suite (EDS)

Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++

Altera SoC FPGA programming Environment

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I am new to program SoC fpga I have a De0 nano SoC board.I am trying to program HPS ARM processor with C language. I have Qsys .info and .sof files which were generated via qsys. I tried with Altera monitor program and found that C code is not available to edit in the software, on disassembly window it shows assembly code. Is there any way to compile and check errors in C code? Is EDS software is free to use without license?

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