What are the arguments for using Nios II ?
Why using FPGA resourses to implement a (seriell) CPU ontop of a parallel structure like an FPGA?
Why mixing two developement "system" on the same architecture?
What type of problems are much easier to solve in Nios compared to verilog/VHDL?
Is it the possibility to re-use the waste C-source code aviable ?
Is it an excellent way to combine an easy way of programming (C) with the possibility of making some parts for parallel execution (verilog)
Was Nios only created for those FPGA users that does not want to learn how a FPGA is working and how to program it?
ASIC's will never be cheap so Nios/verilog/VHDL is the best combination to attempt to mimic ASIC's ?
What is your take on this?
This is a long story, let's talk about a part of it.
Yes maybe the NIOS II lets you re-use the old C code and libraries you have or may find online. But having a customizable system is the main advantage. If you want to create a complex solution that has a certain circuit connected to a microcontroller/processor connected to peripherals you want, you have to create it in the hardware level of finding an Evaluation Kit that matches your system. Simply the NIOS will solve this issue. You can have one NIOS, two, three and more connected together or separated with shared peripherals or separated peripherals or mixed (some shared and some dedicated to a CPU).
The RTL level will be the top-level to connect them together and to add extra circuits to your system.
I cannot tell all the advantages of having a NIOS into the system right now.
Please check the available designs for NIOS as an example of what the NIOS II is used for.