Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12600 Discussions

Arria 10 LW Bridge and LCD 16207

Altera_Forum
Honored Contributor II
1,047 Views

Hi, 

I am using an Arria 10 with Linux as the OS. 

 

I connected the LCD16207 in QSYS to the lightweight bridge on the Arria 10 HPS. I am able to display strings from a test program, but when I try to implement the functions from the test program into my main program, it does not seem to write properly. My main program is threaded and has access to the LW bridge from each thread. What I found was that if another process accesses the LW bridge, it seems to prevent the LCD screen data from being displayed. Here comes the interesting part, on an oscilloscope, I probed the LCD pins and found that when the LW bridge is accessed (both read and write), there is a pulse on the Enable line of the LCD. This occurs even if the LCD memory mapped register is not being accessed. I think this is preventing the LCD from displaying the string properly.  

 

As a note, I am using /dev/mem and mmap to access the lw bridge. I have not had a problem before with the lw bridge and controlling other IP such as the address extender and Altera Serial Flash Controller II. 

 

Why does the enable line have a signal when I am not writing to the LCD 16207? Is there something I am missing here or should the writes to other memory mapped bridge locations not affect the LCD 16207 core? 

 

Thank you
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
348 Views

Hi, I think I found the problem. 

 

I believe that the issue is that some of my functions were writing to non-memory mapped addresses because I have another version where those addresses are in use. I did not completely remove the writes to those addresses and it seems as though they affect other address locations. This phenomenon happened with the LCD and the epcq controller (just found out yesterday). For the EPCQ controller, it seemed as though it would write to the EPCQ when writing a non-mapped address and cause the system to fail to boot (FPGA programmed from EPCQ).  

 

I can avoid this just by modifying my code, but is there an explanation of why this happens? 

 

Thank you 

 

Thanks
0 Kudos
Reply