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Avalon and 8-bit CFI

Altera_Forum
Honored Contributor II
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Hi Al, 

 

I know I discussed this once before with wentao ... but I'd like to confirm ... since I seem to be 

having one of those "senior moments" ;-): 

 

http://forum.niosforum.com/forum/index.php...t=1130&hl=jffs2 (http://forum.niosforum.com/forum/index.php?act=st&f=18&t=1130&hl=jffs2

 

Using the toggle bit (DQ6) to test for flash erase/write operation in progress won't work with the avalon 

bus because the avalon bus performs 4 consecutive reads of an 8-bit device, correct? 

 

i.e. -- for a single 8-bit CPU read, the avalon bus does 4 external bus cycles, and DQ6 does the 

following: 1 -> 0 -> 1 -> 0 ... and the subsequent CPU read will never see DQ6 change state. 

So, data polling via DQ7 is the way to go ... do I have this right? 

 

Regards, 

--Scott
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