BSP Editor generate fails with VIC

Altera_Forum · ‎08-29-2011

I generated a qsys design with NIOS2 and a VIC (Vectored Interrupt Controller).

I then created a NIOS2 application and bsp (used the small hello world template).

The code compiles fine but I wanted to dig deeper into the interrupt handling code and then I noticed that in the drivers section of the bsp, the 'altera_vic_0_vector_tbl.S' file is empty which seemed strange.

I ran the bsp editor and made sure all parameters made sense and then hit 'generate'. The result is an error message: 'TCL script "C:\altera\11.0\ip\altera\altera_vectored_interrupt_controller\top\callbacks.tcl vic_0 ..." error: expected integer but got ""

Can anyone shed light on this?

Thanks, Amit

Altera_Forum · ‎09-01-2011

I ran into the same problem.

It seems that interrupts and qsys don't live in harmony.

I have a complex system which runs ok when using SOPC but when i create the same in qsys then i get tremendous interrupt related issues.

I also wondered why the interrupt custom instruction has been discarded with qsys.

I would recommend to post this issue as a support request to Altera.

let me know any progress...

regards