Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
12366 Discussions

Bidir Reset pin HPS nRST on 5CSEMA6F31I7N doen´t go low while POR

Honored Contributor I

On our board with Cyclone V SoC 5CSEMA6F31I7N the bidirectional reset pin HPS nRST (C27) doen´t goes low while POR. We also see, when voltages fall below the POR threshold it takes several microseconds until the HPS IO-Pins changes to tristate. We have two boards that we can not contact with out Lauterbach Debugger. The boards have worked, on one board we have done some resets over the POR pin and some power on cycles.

0 Kudos
0 Replies