Bootloader and Remote System Upgrade scheme

[Altera_Forum]

Good-morning and happy new year, 

 I work with a Cyclone IV and a nios II processor, I use Active Serial configuration with an EPCS. I want to be able to update my software, and hardware nios application with serial port.  So this is my idea, I want to use a factory hardware and software application stored in EPCS at two fixed address, this application is called at power up and wait for a command from serial port, to reconfigure itself with application hardware and software or store the new application update into EPCS.   The application hardware and software are both store at fixed address in the EPCS.  I made a schema :   https://www.alteraforum.com/forum/attachment.php?attachmentid=8298    Can you tell me if this is coherent, do I made any mistake ? If in my application hardware I define the software address as Reset Vector Memory will it work or I need to made a custom boot-loader to boot to this address ?  Thank you for your help.

[Altera_Forum]

--- Quote Start ---   Can you tell me if this is coherent, do I made any mistake ? If in my application hardware I define the software address as Reset Vector Memory will it work or I need to made a custom boot-loader to boot to this address ?   --- Quote End ---   Sure. This is the normal way to use remote update.  You can even spare the free space between factory hw and sw and place them back to back. For the application software you need a custom bootloader which loads the image from the specified fixed address.

[Altera_Forum]

Thank you for your answer. 

 I try to make a custom bootloader, I found one example : http://www.alterawiki.com/wiki/epcs_bootloaders but I can't make it work.   I use the C boot-loader from the example.  First, I have a nano de0 board with an Spansion S25FL064P memory as EPCS. I never succeed to program it with Nios II Flash Programmer interface. But I use Nios II Flash Programmer to convert elf and sof file into flash format after that I convert with a script flash files to hex file and finally I create a jic file and I use Quartus programmer to program the EPCS.   I created a projet in Eclipse with the boot-loader example. I charged another application (software) in the EPCS at the specific address where the bootload go find it.   I succeed to run the boot-loader example and detect the presence of a program in the EPCS. But when the bootloader try to copy the program into ram it fall in an infinite loop in "the assembly code".  Am I wrong ? Is it possible to debug the boot-loader as a "normal" program in eclipse or I need to put it in the EPCS ROM memory or on a on-chip memory ?  Thank you for your help.

[Altera_Forum]

The 'EPCS rom' is just a hidden block of internal memory at the bottom of the epcs block. 

The normal bootloader is position-independant code (PIC) and knows that the registers are at a fixed offset from the code. If you are compiling the code for a known address it doesn't need to be PIC.  You ought to be able to debug it loaded at an alternate address provided that you change the code so that it can find the epcs registers. Alternatively it should be possible to load the code as part of the fpga image and then debug it via jtag - by getting the jtag debugger to jump to its entry point (the base address). Just make sure that it isn't actually writing over any other code that is actually running.