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12366 Discussions

Bug in "Simple Socket Server" example.

corestar
New Contributor I
245 Views

I'm using Quartus 18.0 Std and generated the "Simple Socket Server" with BSP. There is a bug in led.c:

 

  while(1)
   {
    
      /* Wait 50 milliseconds between pattern updates, to make the pattern slow
       * enough for the human eye, and more impotantly, to give up control so
       * MicroC/OS-II can schedule other lower priority tasks. */ 

      OSTimeDlyHMSM(0,0,0,1000); 

Besides the fact that it says it wants a 50 ms delay and appears to be try and generate a 1000 ms delay, the code for OSTimeDlyHMSM in os_time.c has the following:

    if (hours == 0) {
        if (minutes == 0) {
            if (seconds == 0) {
                if (ms == 0) {
                    return (OS_ERR_TIME_ZERO_DLY);
                }
            }
        }
    }
    if (minutes > 59) {
        return (OS_ERR_TIME_INVALID_MINUTES);    /* Validate arguments to be within range              */
    }
    if (seconds > 59) {
        return (OS_ERR_TIME_INVALID_SECONDS);
    }
    if (ms > 999) {
        return (OS_ERR_TIME_INVALID_MS);
    }

 

So if ms is > 999, as it is here, the function fails.

And I have to wonder why the first part was not written:

    if (hours == 0 && minutes == 0 && seconds == 0 && ms == 0) {
                    return (OS_ERR_TIME_ZERO_DLY);
                }

 

 

0 Kudos
4 Replies
BoonBengT_Intel
Moderator
218 Views

Hi @corestar,

Thank you for posting in Intel community forum and hope this message find you well.
And appreciate that you have pointed out on the gaps notice for the simple socket server design example.
Quick clarification is we may, what are the targeted device mention? And is this the example you referring to?

Warm regards.
BB

BoonBengT_Intel
Moderator
198 Views

Hi @corestar,

Hope this message find you well, by any chances did you managed to look into the clarification mention above?
 
Warm Regards
BB

corestar
New Contributor I
191 Views

Hello,

I was using the NIOS-II tools for the Arria 10 SoC devel kit. It's been a while and we've abandoned the Arria 10 SoC, but I believe I generated the example design within the NIOS-II tools using the generated example design + BSP option.

BoonBengT_Intel
Moderator
169 Views

Hi @corestar,

Noted and thank you on the clarification for pointing this out, will notify the relevant design team to look into this accordingly.
Please do let us know if there is any other doubts that we can help with and we would be more than happy to do so.

Warm regards
BB

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