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Building the preloader from U-BOOT socfpga 2018.01 sources

Altera_Forum
Honored Contributor II
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I'm developing a bare metal application for a cyclone V FPGA. The application is loaded from QSPI flash into RAM by the preloader. 

 

I recently needed to try a new QSPI device. The U-BOOT 2013.01.01 that comes with the EDS doesn't support this device. However the U-BOOT 2018.01 from Altera-opensource GitHub does. So I downloaded the 2018.01 tar.gzip and placed it in Home:\intelFPGA\17.1\embedded\host_tools\altera\preloader. 

 

Then followed the steps for making a new preloader (bsp-editor, make). The build process didn't throw any errors an resulted in a preloader-mkpimage.bin file. 

 

This new preloader doesn't seem to do anything. The old 2013.01.01 outputs a bunch of information to the UART before loading the application. My new preloader doesn't output anything, so I assume it crashes before initializing the UART. 

 

Does anyone have experience with building the pre-loader from newer versions of the u-boot socfpga source? Is this even possible or is the 2013.01.01 version the only option. 

 

My only experience with u-boot so far has been building the standard preloader, so I'm a bit out of my depth with this. 

 

I'm using the 17.1.0.590 EDS if that helps.
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Altera_Forum
Honored Contributor II
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Did you check the uboot configuration before you compile it? Is the diagnostic output enabled, is it using the correct UART channel and configuration pins, and the correct baud rate? 

You can also try and debug the preloader and see if it gets stuck somewhere.
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Altera_Forum
Honored Contributor II
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Hi, 

 

I did enable UART output in the bsp-editor and the baud rate is correct. I have not checked the configuration pins yet. I will try debugging the preloader to see what happens. 

 

I'll post in this thread again when I get the debugger up and running. 

 

Best regards, 

Aldridge
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Altera_Forum
Honored Contributor II
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Hi Aldridge, 

 

Do you manage to boot your board ? 

 

Cheers 

Aurélien
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