HI,I am using Quartus 12.1 sp1, vhdl and Altera Nios II programmed in C code for DE0-Nano Development. Basically, what I have is, data is sent from fpga vhdl block to NIos II system, Nios II system sends the data to serial port, Matlab access the serial port to real time plot the graph.
I am buffering data received from fpga vhdl say 1000 sample points and save it in sdram... after saving these 1000 sample points, the C code will send data to uart so that Matlab can access these serial port data and plot the graph real time.
Once the sdram has all the first 1000 samples points, processor sends the data to serial port for Matlab to plot the graph, then processor proceeds to save the second set of 1000 samples points, then processor sends the data to serial port for Matlab in order to plot the graph, keep repeating for following sets....etc
In my system, the rate the graph is plotted is much slower than the rate the buffering can be done.
My question is, from the perspective of C programming, when the processor is sending data for plotting, can the processor still do the buffering? If not, what should I do so that when the processor is doing the buffering, I still can get the graph plotted at the same time for the previous set of data?
Appreciate any input, forgive newbie question...thank you
