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RPind1
Beginner
414 Views

Can't communicate MT25Q flash over Serial Flash Controller II Intel FPGA IP with quartus_pgm --nios2 or Nios Flash Programmer-- Error 18927 FAILED when using quartus_pgm

I Can't communicate (with Nios Flash Programmer or quartus_pgm) with a flash chip ( MT25QU1G ) on an Arria V via the Serial Flash Controller II on the NIOS processor. (We can however use the chip to configure the FPGA using AS over the dedicated pins -- programmed through a .jic with Quartus Prime Programmer)

 

 quartus_pgm --nios2 --debug

with and without every permutation of

--base=0x10000000     

--epcq

--epcs

--csr=0x7000

--dualdie

 

 

 

All these commands fail with:

 

Info: Using INI file C:/intelFPGA/18.1/quartus/bin64/quartus.ini

Info (18932): Using cable "EthernetBlasterII on 192.168.5.50 [EthernetBlasterII]", device 1, instance 0x00

Info (18932): Resetting and pausing target processor:

Error (18927): FAILED

Info (18932): Leaving target processor paused

Error: Quartus Prime Programmer was unsuccessful. 1 error, 0 warnings

  Error: Peak virtual memory: 4403 megabytes

  Error: Processing ended: Thu Dec 12 13:53:03 2019

  Error: Elapsed time: 00:00:03

  Error: Total CPU time (on all processors): 00:00:00

 

 Additional Info:

==========================

The Programmer (Serial Flash Controller II IP) is running at 10Mhz (well below fMAX of 50Mhz)

 

 

(System ID & Timestamp are accurate)

FYI: From system.h

#define ALT_MODULE_CLASS_epcq_controller2_0_avl_csr altera_epcq_controller2

#define EPCQ_CONTROLLER2_0_AVL_CSR_BASE 0x7000

#define EPCQ_CONTROLLER2_0_AVL_CSR_FLASH_TYPE "MT25QU01G"

#define EPCQ_CONTROLLER2_0_AVL_CSR_IRQ 6

#define EPCQ_CONTROLLER2_0_AVL_CSR_IRQ_INTERRUPT_CONTROLLER_ID 0

#define EPCQ_CONTROLLER2_0_AVL_CSR_IS_EPCS 0

#define EPCQ_CONTROLLER2_0_AVL_CSR_NAME "/dev/epcq_controller2_0_avl_csr"

#define EPCQ_CONTROLLER2_0_AVL_CSR_NUMBER_OF_SECTORS 2048

#define EPCQ_CONTROLLER2_0_AVL_CSR_PAGE_SIZE 256

#define EPCQ_CONTROLLER2_0_AVL_CSR_SECTOR_SIZE 65536

#define EPCQ_CONTROLLER2_0_AVL_CSR_SPAN 64

#define EPCQ_CONTROLLER2_0_AVL_CSR_SUBSECTOR_SIZE 4096

#define EPCQ_CONTROLLER2_0_AVL_CSR_TYPE "altera_epcq_controller2"

 #define ALT_MODULE_CLASS_epcq_controller2_0_avl_mem altera_epcq_controller2

#define EPCQ_CONTROLLER2_0_AVL_MEM_BASE 0x10000000

#define EPCQ_CONTROLLER2_0_AVL_MEM_FLASH_TYPE "MT25QU01G"

#define EPCQ_CONTROLLER2_0_AVL_MEM_IRQ -1

#define EPCQ_CONTROLLER2_0_AVL_MEM_IRQ_INTERRUPT_CONTROLLER_ID -1

#define EPCQ_CONTROLLER2_0_AVL_MEM_IS_EPCS 0

#define EPCQ_CONTROLLER2_0_AVL_MEM_NAME "/dev/epcq_controller2_0_avl_mem"

#define EPCQ_CONTROLLER2_0_AVL_MEM_NUMBER_OF_SECTORS 2048

#define EPCQ_CONTROLLER2_0_AVL_MEM_PAGE_SIZE 256

#define EPCQ_CONTROLLER2_0_AVL_MEM_SECTOR_SIZE 65536

#define EPCQ_CONTROLLER2_0_AVL_MEM_SPAN 134217728

#define EPCQ_CONTROLLER2_0_AVL_MEM_SUBSECTOR_SIZE 4096

#define EPCQ_CONTROLLER2_0_AVL_MEM_TYPE "altera_epcq_controller2"

Tags (1)
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4 Replies
Ahmed_H_Intel1
Employee
170 Views

Hi,

Can you explain what do you mean by having the Programmer running at 10MHz? Do you mean the NIOS processor clock frequency?

Can you please share with us the Qsys design (screen shot is enough) and check the flash IP clock?

Regards,

RPind1
Beginner
170 Views

I should have said "Serial Flash Controller II " IP in Qsys instead of "Programmer." FYI the NIOS is running at ~ 83mhz in this design

Ahmed_H_Intel1
Employee
170 Views

Ohh,

sorry for the late reply, The serial flash controller requires 25MHz, sorry why you use 10 MHz? I don't this gonna work.

 

RPind1
Beginner
170 Views

Hi Ahmed. I don't see any requirement on a MINIMUM speed. Can you point me to that documentation. I have only ever seen an FMAX published. I used 10Mhz because it was the only available clock I had under FMAX. I can and will adjust to FMAX once working it I have the routing resources

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