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12437 Discussions

Can the Cyclone V SoC UART Controller be used as RS485 ?


I have a Cyclone V SoC running in my product with Linux on the ARM.


I uses UART0 controller on the HPS pins for the linux console mounted on /dev/ttyS0.


The UART1 controller signals are linked to the FPGA matrix and then drive a RS485 driver. The RS485 drivers needs 3 signals to perform its tasks :

  • RX => OK
  • TX => OK
  • TX_Enable => Problem !


I have read on several places that I have to use theRS232 RTS signal as TX_Enable to perform RS485 communications.


What I observe is that the RTS pin changes state when I perform an output stream of data, but it doesn't return to its previous state at the end of the frame, but several ms later.

The component I try to read from respond is less than 1ms on the RS485 line. Because RTS is still active, the reception can't be made.


I tried several configuration on the linux driver without success and I'm not sure that I can configure the UART controller driver to use it as an RS485 driver.


I can't imagine I'm the first one facing this problem and any help is welcome. Here is the device tree part of the UART1 controller which make it mounted as ttyS1 in Linux :


hps_uart1: serial@0xffc03000 { compatible = "snps,dw-apb-uart-17.1", "snps,dw-apb-uart"; reg = <0xffc03000 0x00000100>; interrupt-parent = <&hps_arm_gic_0>; interrupts = <0 163 4>; clocks = <&l4_sp_clk>; reg-io-width = <4>; /* embeddedsw.dts.params.reg-io-width type NUMBER */ reg-shift = <2>; /* embeddedsw.dts.params.reg-shift type NUMBER */ status = "okay"; /* embeddedsw.dts.params.status type STRING */ dmas = <&hps_dma 30>, <&hps_dma 31>; dma-names = "tx", "rx"; }; //end serial@0xffc03000 (hps_uart1)



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4 Replies
New Contributor II


What you are experiencing is a typical RS485 problem: If your slave device is too fast, you need a specific driver that changes a Max485 or similar tranceiver from lo to high impedance (write to read). The 16550 uart has a TEMT (transmitter empty interrupt), this interrupt can be used to toggle the direction of the bus driver when direction of data needs to change (just after all bits have left the uart).

The Nios 16550 source code can be modified to do what you need, what the possibilities with the Linux driver are, I cannot tell.

Best Regards,




The current RS232 UART linux driver cannot support RS485.

We are not supporting customization.




hi Johi and Fjumaah,


thanks for your answers.

I thought that this behavior were something usual, I see that I was wrong.

Well, I'll use the 16550 UART controller which contains an "sout_en" signal. This is just to bad to use an FPGA IP whereas almost 99% of the functionality is hard coded into the SoC.




You are welcome Aurélien,

You still can use the Soft-core IPs from FPGA side. However, you might not be able to use the software driver of this IP on HPS. The software drivers of the soft-core IPs available in Platform designer were developed to support embedded Nios II system designs. You can access these IPs from HPS, and you need to develop your own driver/macro to function this IP.


Best Regards.