I have a project which contains a NiosII CPU and compiles successfully, but when I turn on the option to generate an IBIS model (Assignments > EDA Tool Settings > Board level signal integrity analysis > IBIS) I get the following error:Error: Can't generate netlist output files because the file "cpu.v" is an OpenCore Plus time-limited file. So I assume I need a full NiosII license? What's the cheapest way to obtain one; is it by purchasing the $449 NEEK development kit? http://www.altera.com/products/devkits/altera/kit-cyc3-embedded.html We're not putting anything into production, we just want to run signal integrity on our prototype board. -- edit -- After a little further digging, it appears we'd need to buy the Embedded IP Suite for $995 to get this functionality. Is this correct? I realize there is $500 off if you buy the IP Suite with a devkit, but we don't need any more devkits, just the license! --
--- Quote Start --- You are correct. Purchasing that dev kit is the cheapest solution for obtaining the license. --- Quote End --- Are you sure? I have my doubts because of this paragraph on the NEEK page: "intellectual property (ip) licenses are sold separately. you may still install and start designing with any altera ip core via the opencore plus (pdf) simulation and hardware evaluation feature." The NEEK page makes it sound like you get the OpenCore Plus version of NiosII and that a full license ($995) needs to be purchased separately. OpenCore Plus is what we have now and is not letting us generate the IBIS model. Our local FAE has been slow to respond so that's why I'm asking here.
OK, assuming we buy the Embedded IP Suite, does anyone know if it wiill work with the Web Edition of Quartus 9.0, or do we have to buy the subscription edition of Quartus?
I have used a Nios II license with the web edition of Quartus. You can definitely create a non time limited sof file this way. I would assume creating an IBIS model would also work.