Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.

Clock enquiry

Honored Contributor I

I am using an FPGA board with a CYCLONE (EP1C3T100C6). I want to locate a clock signal as output from the cyclone. I see pins such as 66, etc marked as CLK2, etc. Are these pins outputs or inputs? In general, I need to assign a Cyclone pin as a clock pin to a D flip flop. Help. 


0 Kudos
1 Reply
Honored Contributor I

The pin you refer to is a dedicated clock INPUT pin. So, don't expect to be able to drive a clock signal out of it. 


This pin would be ideal for sourcing a clock into the clock input of a D-type flip-flip - as you go on to describe. 


Finally, the clock signal you wish to drive out of the FPGA. Simplistically, you can drive a 'clock' (or any other) signal out of any of the 'IO' pins. This can be either; a clock of the same frequency you put into the device; a higher frequency clock - generated using the device's PLLs; or a lower speed clock using either the PLLs or logic (D-types). Refer to the document "using plls in cyclone devices (" - for details as to the clock in and out requirements for Cyclone PLLs.