Custom Components and VHDL Code

[Altera_Forum]

I have just started to design with the SOPC Builder. Could someone please explain to me how the VHDL code placed in a custom component relates to the outside world and the avalon bus/Nios II Microprocessor. Specifically - how does the addressing work - If I want, lets say, set a specific signal high at a specific address - do I need a chip select within the VHDL ? Do I need to incorporate an address into my VHDL code ? How does the base address of the component relate to my VHDL code and will the following code work without any address decoding within the VHDL :-  

 OUPUTsignal <= &#39;1&#39; when CS = &#39;1&#39; and WRITE =&#39;1&#39; else &#39;0&#39;;  Could this type of functionality be incoporated into the Custom Component without any VHDL code ?  Also could someone please explain to me the purpose of adding the software files to the custom component - does this create an address offset for different signals or is it just used for driver purposes ?

[Altera_Forum]

--- Quote Start ---  originally posted by shmueld@Mar 12 2006, 08:27 PM i have just started to design with the sopc builder. could someone please explain to me how the vhdl code placed in a custom component relates to the outside world and the avalon bus/nios ii microprocessor. specifically - how does the addressing work - if i want, lets say, set a specific signal high at a specific address - do i need a chip select within the vhdl ? do i need to incorporate an address into my vhdl code ? how does the base address of the component relate to my vhdl code and will the following code work without any address decoding within the vhdl :-   ouputsignal <= &#39;1&#39; when cs = &#39;1&#39; and write =&#39;1&#39; else &#39;0&#39;;  could this type of functionality be incoporated into the custom component without any vhdl code ?  also could someone please explain to me the purpose of adding the software files to the custom component - does this create an address offset for different signals or is it just used for driver purposes ? <div align='right'><{post_snapback}> (index.php?act=findpost&pid=13347)  --- quote end ---    --- Quote End ---   1) If You want to placed your custom component to SOPC builder firstly you should read the manual "Quartus II Version 5.1 Handbook  Volume 4: SOPC Builder 5. Component Editor" and, of course, the manual "Avalon Bus Specification" 2) Address decoding works like that for example(Sorry for Verilog HDL http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif )  //regs of custom component if(chipselect & write) begin case(address[2:0])  3&#39;d0:r0<=#1 writedata;  3&#39;d1:r1<=#1 writedata;  3&#39;d2:control0<=#1 writedata;  3&#39;d3:adr0<=#1writedata;  3&#39;d4:size0<=#1writedata;  3&#39;d5:control1<=#1 writedata;  3&#39;d6:adr1<=#1writedata;  3&#39;d7:size1<=#1writedata; endcase end  But, if You want component with one output you should write as like you have already written in your message, I mean:  OUPUTsignal <= datawrite(0) when CS = &#39;1&#39; and WRITE =&#39;1&#39;; this code writes bit 0 from avalon bus to output world.  3) Adding the software files to the custom component is adding functionality to your componets - initializations, calling and etc(drivers :-)) and does not create any an address offset&#39;s for it. An address offset and base address are setting in SOPC Builder only.

[Altera_Forum]

--- Quote Start ---  originally posted by shmueld@Mar 12 2006, 06:27 PM i have just started to design with the sopc builder. could someone please explain to me how the vhdl code placed in a custom component relates to the outside world and the avalon bus/nios ii microprocessor. specifically - how does the addressing work - if i want, lets say, set a specific signal high at a specific address - do i need a chip select within the vhdl ? do i need to incorporate an address into my vhdl code ? how does the base address of the component relate to my vhdl code and will the following code work without any address decoding within the vhdl :-   ouputsignal <= &#39;1&#39; when cs = &#39;1&#39; and write =&#39;1&#39; else &#39;0&#39;;  could this type of functionality be incoporated into the custom component without any vhdl code ?  <div align='right'><{post_snapback}> (index.php?act=findpost&pid=13347)  --- quote end ---    --- Quote End ---    Well, the hardware you designed with your VHDL code is placed in the NIOS address space, so you can address it with its own address range starting from tha base address. It seems you only want to access one register, is this right? For this you only need the cs or write signal, as you only have one address anyway.  I&#39;m not quite sure what you mean by incorporating functionality without VHDL code, but there&#39;s always verilog! http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/tongue.gif

[Altera_Forum]

Thanks for your help. I am now reading the Avalon Interface Specification which is giving me a lot of the information I need.

[Altera_Forum]

I have the same question with you. If you have resolve your problem, could you please share your solution with me? Thank you. My email is maxiaoyu_1984@126.com.