Community
cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Novice
149 Views

Custom IP: ALT_ENHANCED_INTERRUPT_API_PRESENT not being set

Jump to solution

I've created a very simple system with a Nios II/e, On chip Memory and a custom IP module.

My custom IP has an interrupt sender that is attached to the Nios core. I'm using the internal interrupt controller.

 

When I generate the BSP, ALT_ENHANCED_INTERRUPT_API_PRESENT is not being defined in system.h. However, if I add some Intel IP, for example the altera_avalon_uart, regenerate the BSP, then ALT_ENHANCED_INTERRUPT_API_PRESENT becomes defined.

 

This is IRQ section from my _hw.tcl for my custom IP

add_interface TimeIRQ interrupt sender   set_interface_property TimeIRQ enabled true set_interface_property TimeIRQ associatedAddressablePoint AvalonSlave set_interface_property TimeIRQ associatedClock SystemClock set_interface_property TimeIRQ associatedReset SystemReset   add_interface_port TimeIRQ ctrl_irq irq Output 1

Here is my _sw.tcl file

create_driver TimeSync_driver set_sw_property hw_class_name TimeSync set_sw_property isr_preemption_supported true set_sw_property supported_interrupt_apis enhanced_interrupt_api set_sw_property bsp_subdirectory drivers add_sw_property include_source inc/timeSync.h add_sw_property supported_bsp_type HAL add_sw_property supported_bsp_type LWHAL

It looks like the tools understand that my IP supports the enhanced interrupt API when an official interrupt generating bit of IP is in the project, but when the 'official' module is removed, it doesn't recognise my IP generates an interrupt.

 

Any help/suggestions gratefully received.

 

I'm using Quartus Lite 18.1.0 Build 625 on Windows 10

 

Tags (1)
0 Kudos

Accepted Solutions
Highlighted
Novice
39 Views

It turns out that you need to set the 'optional' min_compatible_hw_version property in the _sw.tcl file

set_sw_property min_compatible_hw_version 1.0

Without this set, I don't think the driver was being properly detected.

 

When looking under the Drivers tab in the BSP editor, although my custom IP module was listed in the table (Module Name and Module Class Name were populated), the Driver Name and Driver Version entries were 'none' and there was a warning in the Problems Tab in BSP Editor:

'Hardware Component "TimeSync:1.0" does not meet candidate driver "Time Sync_driver" stated minimal compatible hardware version "7.1".

 

-- New Info

Having thought I'd sorted the problem it came back!

 

It turns out that when the BSP was being generated it wasn't always finding my custom _sw.tcl files.

 

If you run the nios2-bsp command from the command line it outputs where it is searching for these files. I've got my custom IP in their own folder within my FPGA project. I have this as a search path in Platform Designer. nios2-bsp wasn't looking in the correct place. So no idea why it sometimes worked!!

 

Section 8.8.4 of the Nios II Software Developers Handbook 19.2 has some more info.

 

I've now got my custom IP in the following location:

<FPGA project root>/ip/<My company name>/<componentName>/

With the sw.tcl file here:

<FPGA project root>/ip/<My company name>/<componentName>/componentName_sw.tcl

 

This seems to have made things work again.... for now!

View solution in original post

0 Kudos
1 Reply
Highlighted
Novice
40 Views

It turns out that you need to set the 'optional' min_compatible_hw_version property in the _sw.tcl file

set_sw_property min_compatible_hw_version 1.0

Without this set, I don't think the driver was being properly detected.

 

When looking under the Drivers tab in the BSP editor, although my custom IP module was listed in the table (Module Name and Module Class Name were populated), the Driver Name and Driver Version entries were 'none' and there was a warning in the Problems Tab in BSP Editor:

'Hardware Component "TimeSync:1.0" does not meet candidate driver "Time Sync_driver" stated minimal compatible hardware version "7.1".

 

-- New Info

Having thought I'd sorted the problem it came back!

 

It turns out that when the BSP was being generated it wasn't always finding my custom _sw.tcl files.

 

If you run the nios2-bsp command from the command line it outputs where it is searching for these files. I've got my custom IP in their own folder within my FPGA project. I have this as a search path in Platform Designer. nios2-bsp wasn't looking in the correct place. So no idea why it sometimes worked!!

 

Section 8.8.4 of the Nios II Software Developers Handbook 19.2 has some more info.

 

I've now got my custom IP in the following location:

<FPGA project root>/ip/<My company name>/<componentName>/

With the sw.tcl file here:

<FPGA project root>/ip/<My company name>/<componentName>/componentName_sw.tcl

 

This seems to have made things work again.... for now!

View solution in original post

0 Kudos