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Cyclone 5 PLLs

Altera_Forum
Honored Contributor II
821 Views

Is there a programatic way to re-configure the on chip PLLs? I don't mean loading a new .mif file, but rather having the embedded OS calculate the constants required to re-load the PLL for a different frequency? 

 

I would like to have the embedded OS be able to generate a wider range of frequencies off of the base clock. 

 

Thanks, 

Jon Herr
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3 Replies
Altera_Forum
Honored Contributor II
85 Views

Yes, it is possible. Use the "Altera PLL Reconfig" component in your Qsys system. https://www.altera.com/en_us/pdfs/literature/an/an661.pdf

Altera_Forum
Honored Contributor II
85 Views

 

--- Quote Start ---  

Is there a programatic way to re-configure the on chip PLLs? I don't mean loading a new .mif file, but rather having the embedded OS calculate the constants required to re-load the PLL for a different frequency? 

 

I would like to have the embedded OS be able to generate a wider range of frequencies off of the base clock. 

 

Thanks, 

Jon Herr 

--- Quote End ---  

 

 

Hi Jon, 

 

If you are referring to the HPS PLL, you can refer to the chapter "Clock Manager" in the Technical reference manual here: 

https://www.altera.com/en_us/pdfs/literature/hb/cyclone-v/cv_5v4.pdf 

 

Check the "Hardware-Managed and Software-Managed Clocks" section for details on the clock management.
Altera_Forum
Honored Contributor II
85 Views

Thanks to all for the prompt replies! 

-Jon H.
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