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Altera_Forum
Honored Contributor I
1,955 Views

Cyclone V Dev Board - Problem using sopc2dts

Thanks in Advance. 

We are using Qsys/Quarturs 14.1. 

 

Our linux release is Poky 8.0 - Linux version 3.9.0 

 

We have taken the GSRD for the Cyclone V and added to the design a 16550 serial port on the HSMC connector. 

Then I have taken the generated *.sopcinfo to create the new *.dtb file utilizing the following command: 

sopc2dts --input gsrd_modified.sopcinfo 

--output socfpga.dtb 

--type dtb 

--board soc_system_board_info.xml 

--bridge-removal all 

--clocks 

 

I then replace the original *.dtb file with the newly created *.dtb file on the microSD card.  

 

While booting I get some WARNING messages with traces and the final message with a trace is: 

 

Unable to handle kernel paging at virtual address c08d400c 

 

... 

 

Internal error: Oops: 807 [#1] SMP ARM 

 

... 

 

I am enclosing the complete boot message.  

 

 

Am I doing something wrong in creating the *.dtb file?  

 

Is there a later kernel version I should be using?
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16 Replies
Altera_Forum
Honored Contributor I
114 Views

O.K. So in working more. I realized that I was mixing 13.1 files with 14.1 files. I had been using 13.1 with the Cyclone V Dev Kit but updated yesterday to Quartus 14.1.  

 

So there was one more *.xml file that is needed in the command above. "--board hps_common_board_info.xml" I haven't done that yet because I figured the first thing I should do is update the microSD card with the included 14.1 files in the /14.1/embedded/examples/hardware/cv_soc_devkit_ghrd"  

 

So, I copied: u-boot.src, soc_system.rbf, soc_system.dtb to the microSD card and tried booting... 

 

I get the message: 

 

reading u-boot.src 

242 bytes read in 6ms (39.KiB/s) 

# # Executing script at 02000000 

reading output_files/soc_system.rbf 

** Unable to read file output_files/soc_system.rbf ** 

altera_load: Failed with error code -4 

 

... 

 

Any suggestions? This should have worked shouldn't it have?
Altera_Forum
Honored Contributor I
114 Views

I believe that error code 4 means that you have incorrectly set your dipswitch settings

Altera_Forum
Honored Contributor I
114 Views

So then why does the original 13.1 sdCard Images work? Are there different DIP switch settings between 13.1 and 14.1? 

 

I'll look at the DIP switches to be certain. Thanks -- Anyone else have any suggestions?
Altera_Forum
Honored Contributor I
114 Views

Hi, I think that it has to do with the generation of the .rbf file which is uncompressed when you just follow the instructions. Did you note the difference of the filesize of the original raw binary and the newly generated one? If you click on properties when you added the sof image then you'll find a checkbox to enable compression. Let me know if that helps...

Altera_Forum
Honored Contributor I
114 Views

O.K so I went back to the 13.1 sdCard image so I could start fresh and see how big files were.  

 

socfpga.dtb is 17.6 KB 

soc_system.rbf is 6.7 MB --- THIS IS NOT COMPRESSED  

u-boot.src is 200 bytes 

zImage is 3.1 MB 

 

So, when I read your reply it seemed to me you were telling me to COMPRESS but from looking at this and from the fact that I was compressing the 14.1 *.rbf that I'm not supposed to compress the *.rbf. 

 

I'll work that way and see how things go. I'll post my success or failure. THANKS.
Altera_Forum
Honored Contributor I
114 Views

UNCOMPRESSED *.rbf file WORKS!! I hope this helps others. There are so many details. I generated the *.rbf file from Qsys/Quartus 14.1  

 

I'll now see about adding what I need to the Linux kernel (serial support)- see that that works (I've done that before).  

 

When that works then I'll go to our new Cyclone V design that adds the serial port and generate the *.dtb file and *.rbf that go with that design.
Altera_Forum
Honored Contributor I
114 Views

 

--- Quote Start ---  

UNCOMPRESSED *.rbf file WORKS!! I hope this helps others. There are so many details. I generated the *.rbf file from Qsys/Quartus 14.1  

 

I'll now see about adding what I need to the Linux kernel (serial support)- see that that works (I've done that before).  

 

When that works then I'll go to our new Cyclone V design that adds the serial port and generate the *.dtb file and *.rbf that go with that design. 

--- Quote End ---  

 

 

Hi, 

 

Can you tell me what your issue was? In the meantime I have been able to succesfully get it work with the 13.1 tools. I will try the 14.1 tools. 

Btw, I believe that the most tricky part will be the correct setting up of the board info.xml for generating the .dts file.  

With the ghrd that info is already avalaible but i expect more difficulties when expanding the ghrd system with own ip components. 

 

regards
Altera_Forum
Honored Contributor I
114 Views

 

--- Quote Start ---  

Hi, 

 

Can you tell me what your issue was? In the meantime I have been able to succesfully get it work with the 13.1 tools. I will try the 14.1 tools. 

Btw, I believe that the most tricky part will be the correct setting up of the board info.xml for generating the .dts file.  

With the ghrd that info is already avalaible but i expect more difficulties when expanding the ghrd system with own ip components. 

 

regards 

--- Quote End ---  

 

 

My issue was that the Quartus 14.1 generated *.rbf file was compressed (2.2 MB) while the corresponding *.sof was approximately 7.0 MB. This is done in the "File-Convert file..." as per the instructions on one of the Rocketboard pages. So, when I used the uncompressed version and replaced that *.rbf file on the SD card. It booted fine. Today I'll be trying our design which is the Golden design with the IP 16550 off of the HMCS connector. I don't believe I need to change the board_info file for this. I think the sopcinfo will map this to the HMCS connector that should already be a part of the board_info. I will post what I find if you are interested. Let me know. I'm heading to the LAB now.
Altera_Forum
Honored Contributor I
114 Views

Hi, 

I am working on Cyclon V soc kit,I want to generate .dts from sopcinfo file.I am not using GHRD design(that is prepared by altera).I am workng on my design in which I have added my custom IP core in qsys system. 

My issue is how ca I prepare sos_system_board_info.xml and hps_clock_info.xml ?? 

 

what I run this command without these .xml file I got following message. 

command: 

$ sopc2dts --input soc_system.sopcinfo 

--output socfpga.dts 

--board soc_system_board_info.xml 

--board hps_clock_info.xml  

 

message : 

Exception occurred: use -v for more information 

Exception occurred: use -v for more information 

Component i2c_master of class sls_avalon_i2c_m is unknown 

Component video_data_stream of class video_data_stream is unknown 

Component i2c_master of class sls_avalon_i2c_m is unknown 

Component video_data_stream of class video_data_stream is unknown 

 

Please let me know if you have any idea about ,how to prepare xml files.
Altera_Forum
Honored Contributor I
114 Views

Hi, 

 

Follow the rules descibed on this page: 

 

http://www.alterawiki.com/wiki/sopc2dts 

 

Look at the section Module and Interface Assignments in hw.tcl Influencing Sopc2dts  

 

It seems that you did not have set up the following assignments in the _hw.tcl file of your custom components. 

 

set_module_assignment embeddedsw.dts.compatible 

set_module_assignment embeddedsw.dts.group 

set_module_assignment embeddedsw.dts.params 

set_module_assignment embeddedsw.dts.name 

set_module_assignment embeddedsw.dts.vendor 

 

 

regards
Altera_Forum
Honored Contributor I
114 Views

Hi, follow the rules at this page: 

 

www.alterawiki.com/wiki/sopc2dts in the section "Module and Interface Assignments in hw.tcl Influencing Sopc2dts" 

 

It seems that you did not setup your _hw.tcl for your custom ip components. 

 

regards
Altera_Forum
Honored Contributor I
114 Views

 

--- Quote Start ---  

Hi, 

I am working on Cyclon V soc kit,I want to generate .dts from sopcinfo file.I am not using GHRD design(that is prepared by altera).I am workng on my design in which I have added my custom IP core in qsys system. 

My issue is how ca I prepare sos_system_board_info.xml and hps_clock_info.xml ?? 

 

what I run this command without these .xml file I got following message. 

command: 

$ sopc2dts --input soc_system.sopcinfo 

--output socfpga.dts 

--board soc_system_board_info.xml 

--board hps_clock_info.xml  

 

message : 

Exception occurred: use -v for more information 

Exception occurred: use -v for more information 

Component i2c_master of class sls_avalon_i2c_m is unknown 

Component video_data_stream of class video_data_stream is unknown 

Component i2c_master of class sls_avalon_i2c_m is unknown 

Component video_data_stream of class video_data_stream is unknown 

 

Please let me know if you have any idea about ,how to prepare xml files. 

--- Quote End ---  

 

 

You did not assign the correct Module and Interface Assignments in the _hw.tcl of you custom ip 

 

regards
Altera_Forum
Honored Contributor I
114 Views

Hi meds7, 

 

This is a part of my .dts file: 

in that my module is ''vidoe data stream' ,other modules mentioned with compitible options and my modules is with unknown ,but I can't find any option in .tcl that represents compatible option.one more thins is ,this is my custom module so it doesn't have compatible options in that. 

 

//===================================== 

jtag_uart: serial@0x20000 { 

compatible = "altr,juart-14.1", "altr,juart-1.0"; 

reg = <0x00020000 0x00000008>; 

interrupt-parent = <&hps_0_arm_gic_0>; 

interrupts = <0 42 4>; 

}; //end serial@0x20000 (jtag_uart) 

 

video_data_stream_0: unknown@0x30040 { 

compatible = "unknown,unknown-1.0"; 

reg = <0x00030040 0x00000040>; 

}; //end unknown@0x30040 (video_data_stream_0) 

 

sysid_qsys: sysid@0x10000 { 

compatible = "altr,sysid-14.1", "altr,sysid-1.0"; 

reg = <0x00010000 0x00000008>; 

id = <2899645456>; /* embeddedsw.dts.params.id type NUMBER */ 

timestamp = <1437468644>; /* embeddedsw.dts.params.timestamp type NUMBER */ 

}; //end sysid@0x10000 (sysid_qsys) 

//=====================================  

 

Let me know if you have any idea about that. 

 

Thanks for reply.
Altera_Forum
Honored Contributor I
114 Views

 

--- Quote Start ---  

Hi meds7, 

 

This is a part of my .dts file: 

in that my module is ''vidoe data stream' ,other modules mentioned with compitible options and my modules is with unknown ,but I can't find any option in .tcl that represents compatible option.one more thins is ,this is my custom module so it doesn't have compatible options in that. 

 

//===================================== 

jtag_uart: serial@0x20000 { 

compatible = "altr,juart-14.1", "altr,juart-1.0"; 

reg = <0x00020000 0x00000008>; 

interrupt-parent = <&hps_0_arm_gic_0>; 

interrupts = <0 42 4>; 

}; //end serial@0x20000 (jtag_uart) 

 

video_data_stream_0: unknown@0x30040 { 

compatible = "unknown,unknown-1.0"; 

reg = <0x00030040 0x00000040>; 

}; //end unknown@0x30040 (video_data_stream_0) 

 

sysid_qsys: sysid@0x10000 { 

compatible = "altr,sysid-14.1", "altr,sysid-1.0"; 

reg = <0x00010000 0x00000008>; 

id = <2899645456>; /* embeddedsw.dts.params.id type NUMBER */ 

timestamp = <1437468644>; /* embeddedsw.dts.params.timestamp type NUMBER */ 

}; //end sysid@0x10000 (sysid_qsys) 

//=====================================  

 

Let me know if you have any idea about that. 

 

Thanks for reply. 

--- Quote End ---  

 

 

Hi, I mean the _hw.tcl file that belongs to your custom ip component. You said you designed several custom Avalon components which you instantiate in your Qsys design. You need to setup a _hw.tcl file for your component where you should define some settings. 

 

Please have a look at this page; 

 

http://www.alterawiki.com/wiki/sopc2dts under section Module and Interface Assignments in hw.tcl Influencing Sopc2dts  

 

Regards
Altera_Forum
Honored Contributor I
114 Views

 

--- Quote Start ---  

Hi meds7, 

 

This is a part of my .dts file: 

in that my module is ''vidoe data stream' ,other modules mentioned with compitible options and my modules is with unknown ,but I can't find any option in .tcl that represents compatible option.one more thins is ,this is my custom module so it doesn't have compatible options in that. 

 

//===================================== 

jtag_uart: serial@0x20000 { 

compatible = "altr,juart-14.1", "altr,juart-1.0"; 

reg = <0x00020000 0x00000008>; 

interrupt-parent = <&hps_0_arm_gic_0>; 

interrupts = <0 42 4>; 

}; //end serial@0x20000 (jtag_uart) 

 

video_data_stream_0: unknown@0x30040 { 

compatible = "unknown,unknown-1.0"; 

reg = <0x00030040 0x00000040>; 

}; //end unknown@0x30040 (video_data_stream_0) 

 

sysid_qsys: sysid@0x10000 { 

compatible = "altr,sysid-14.1", "altr,sysid-1.0"; 

reg = <0x00010000 0x00000008>; 

id = <2899645456>; /* embeddedsw.dts.params.id type NUMBER */ 

timestamp = <1437468644>; /* embeddedsw.dts.params.timestamp type NUMBER */ 

}; //end sysid@0x10000 (sysid_qsys) 

//=====================================  

 

Let me know if you have any idea about that. 

 

Thanks for reply. 

--- Quote End ---  

 

 

You said you made some custom ip components that you use in Qsys. When you did that you needed to create a corresponding _hw.tcl file. 

That one seems to miss some essential Module and Interface Assignments.. 

 

Look at the altera wiki for : 

[h=2]Module and Interface Assignments in hw.tcl Influencing Sopc2dts[/h]
Altera_Forum
Honored Contributor I
114 Views

Also have a look at the "Creating Qsys Components" chapter of the quartus II handbook. In the latest version 15.0 it is chapter 6. There you see the _hw.tcl for you custom component defined. On the wiki that I showed you additional info is found on additional module assignments that influence the creation of your .dts file after you feed it to sopc2tds. 

 

regards
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