Cyclone V transceiver LVDS reception problem

[Altera_Forum]

Hello, 

I'm trying to use the Hard IP Cyclone V transceiver Native PHY v 15.0 that I create with MegaWizard.  I'd like that  2 Gbit/s LVDS signals  DATA_P   -------------- DATA  | LVDS | -----------------|Deserialization|------|8b10b decoder|----- I'd like to have this signal in the end.  --------------  DATA_N  I'd like to link a LVDS signal on the RX channel. During the instanciation I put DATA_P ( it's a std_logic_vector (0 downto 0)) in the serial data of the transceiver but Quartus II automatically create a DATA_P(n) whereas i created a DATA_N sig declared as a LVDS on the pin planner. (I declared DATA_P as a LVDS)  My instanciation of the transceiver is that: Good instanciation?  RX_transceiver_2GIGA: transceiver_2_Gbit port map(   (others => '0'),--rx_analogreset,  (others => '0'),--rx_digitalreset,  (others => '0'),--rx_cdr_refclk,  DATA_P,--rx_serial_data, --DATA_buffered(0 downto 0)  rx_parallel_data_sig,--rx_parallel_data,  (others => '0'),--rx_std_coreclkin,  rx_std_clkout_sig,--rx_std_clkout,  rx_cal_busy_sig,--rx_cal_busy,  (others => '0'),--reconfig_to_xcvr,  open);--reconfig_from_xcvr);   I tried to use a ALIOBUF in differential configuration but it doesn't work.  I'd like to know how to use de Clock Data Recovery please? I don't understand de datasheet. Should I use the transceiver reconfiguration controller?  Can you help me please?

[Altera_Forum]

--- Quote Start ---  Hello,  I'd like to link a LVDS signal on the RX channel. During the instanciation I put DATA_P ( it's a std_logic_vector (0 downto 0)) in the serial data of the transceiver but Quartus II automatically create a DATA_P(n) whereas i created a DATA_N sig declared as a LVDS on the pin planner. (I declared DATA_P as a LVDS)   --- Quote End ---    As far as I know, if a pin is LVDS, then Quartus expects to see a signal named as the pin planner shows. Personally, I just declare the positive pin of the signal and let quartus fit the negative pin. You can also name a signal SIGNAL and SIGNAL_n and Quartus should automatically pick it up correctly. For you, this would be DATA and DATA_N.  Check out http://www.alteraforum.com/forum/showthread.php?t=2707. If you don't need the special buffers, you can always do each pin separately and not declare the LVDS assignment, but this is for the transceivers, which is usually a special case.

[Altera_Forum]

Hello, Thanks you for the answer :) 

 In the pin planner when you choose LVDS the second signal is created!