Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12475 Discussions

DDR2 ALTMEMPHY critical warning

Altera_Forum
Honored Contributor II
730 Views

I am getting the following critical warning 

 

Critical Warning: ALTMEMPHY PLL, Nios_Only:inst|Nios_Only_altmemddr:altmemddr|Nios_Only_altmemddr_controller_phy:Nios_Only_altmemddr_controller_phy_inst|Nios_Only_altmemddr_phy:Nios_Only_altmemddr_phy_inst|Nios_Only_altmemddr_phy_alt_mem_phy:Nios_Only_altmemddr_phy_alt_mem_phy_inst|Nios_Only_altmemddr_phy_alt_mem_phy_clk_reset:clk|Nios_Only_altmemddr_phy_alt_mem_phy_pll:pll|altpll:altpll_component|altpll_g5l3:auto_generated|clk[1], when fed by another PLL, must have bandwidth mode set to High instead of Medium 

 

I believe this is because my NIOS system is being fed from another PLL. What I can't work out is where do I change the bandwidth mode in the Altmemphy controller. 

 

Can someone point me in the right direction? 

 

Thanks
0 Kudos
0 Replies
Reply