Nios® V/II Embedded Design Suite (EDS)
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DE0 with Nios II Help

Altera_Forum
Honored Contributor II
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Hi, 

 

I am a beginner with altera products. I am working with the DE0 development kit and am trying to implement a Nios II processor but am having troubles with understanding how C code works with the verilog code. For example, I am working with a project in which I stream data to a VGA display. This works fine without the processor. When I add the processor I try to pass data in and then right back out in the hopes of getting the same response as prior to using the processor (See code below). However, the image is distorted. How can I synchronize the hardware with the processor?  

 

Any help would be greatly appreciated!! 

 

Thanks, 

Tiff 

 

// obtain data from FPGA 

gray = IORD_ALTERA_AVALON_PIO_DATA(I_DATA_BASE); 

 

//output data to FPGA 

IOWR_ALTERA_AVALON_PIO_DATA(O_DATA_BASE,gray);
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