Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++

DE1 AUDIO CODEC help needed

Altera_Forum
Honored Contributor II
1,059 Views

Hello, 

 

I am using DE1-SOC audio codec. I have sound by linking ADCDAT to DACDAT. I do this with a switch. So I can disable sound or listen to it by using this switch.  

The next step is to make a 24 bits left and right data from ADCDAT and then manipulate it and get it back to DACDAT. 

So I made 2 processes:  

The following converting ADCDAT to 24 bits data left and right 

PROCESS(BCLK,NRST) 

 

 

BEGIN 

if NRST = '0' then 

AUD_DACLRCK_OLD <= '1';  

GO <= '0' ; 

index <= 0 ; 

ch <= 0; 

temp <= conv_std_logic_vector(0, 24) ; 

elsif rising_edge(BCLK) then 

if AUD_DACLRCK_OLD = '1' AND AUD_DACLRCK = '0' then 

ch <= 1; 

AUD_DACLRCK_OLD <= '0' ; 

index <= 24; 

end if; 

if AUD_DACLRCK_OLD = '0' AND AUD_DACLRCK = '1' then 

AUD_DACLRCK_OLD <= '1' ; 

ch <= 2; 

index <= 24 ; 

end if;  

if ch = 1 then  

if index >= 0 then 

temp(index) <= AUD_ADCDAT ; 

end if; 

index <= index - 1 ; 

if index = -1 then RES_LEFT <= temp(23 downto 0) ; ch <= 0;end if; 

end if; 

if ch = 2 then  

if index >= 0 then 

temp(index) <= AUD_ADCDAT ; end if; 

index <= index - 1 ; 

 

if index = -1 then RES_RIGHT <= temp(23 downto 0) ; ch <= 0; end if; 

end if; 

end if; --rising_edge 

 

 

END PROCESS; 

 

For getting it back to 1 bit: 

PROCESS(BCLK,NRST) 

variable i,j : integer; 

BEGIN 

if NRST = '0' then 

i := 0; j := 0; 

LR <= '0'; 

GO <= '0'; 

 

 

elsif rising_edge(BCLK) then 

--if rising_edge(START) and GO = '0' then  

AUD_DACLRCK_OLD <= AUD_DACLRCK; 

if AUD_DACLRCK_OLD = '0' AND AUD_DACLRCK = '1' then 

ch <= 0;ch2 <= 1;  

data_left <= datain_left; 

data_right <= datain_right;  

j := 24 ;  

end if;  

if AUD_DACLRCK_OLD = '1' AND AUD_DACLRCK = '0' then 

ch <= 1; ch2 <= 0; 

i := 24; 

end if; 

if (ch = 1) then  

if i >=0 and i <= 23 then AUD_DACDAT <= data_left(i) ;end if;  

i:= i-1; 

elsif (ch2 = 1) then  

if j >=0 and j <= 23 then AUD_DACDAT <= data_right(j) ;end if;  

j:= j-1; 

end if; --GO 

if i <0 then ch <= 0; end if; 

if j <0 then ch2 <= 0; end if; 

end if; 

 

 

END PROCESS; 

 

 

 

So if I connect ADCDAT to DACDAT I get perfect sound. But if I do it as above I get too much noise. 

 

Any idea? 

I appriciate your help...
0 Kudos
0 Replies
Reply