Hi,after completing your design in M file,add another red icon "SignalCompiler" into your file,then when you Analyze it ,press the first button on the right side of the popped wizard, then your design would be automatically convenrted to HDL file. But the prerequisite is your valid license. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/wink.gif Don
hi,i am a member of the project team along with Mr. Murugan. we have a valid license for DSP builder. we have tried out with the examples given by altera along with DSP-B, which are available in simulink once dsp-b is installed, which use predominantly altera provided blocks. dsp-b user guide states that it can be used to convert .mdl files which uses both altera provided and simulink blocks into hdl. when we use simulink blocks we get the error " input signal not connected". we are setting simulink blocks to sample mode as said in dsp-b user guide. is there a solution. thanks venu
Hi,As far as I know, DSP Builder can only convert Altera blocks into hardware. Have a look at C:\altera\DSPBuilder\AltLib\DSPBUILDER.VHD, which has vhdl for each of the altera blocks. As there is no equvilant for simulink blocks, these can not be converted. To make some hardware, make a design out of altera blocks. You need to have bus blocks (altera Input and Output blocks) at the edges of your design. You can then connect simulink blocks like scopes and sources to these blocks. Running signal compiler will create the port mappings between the predefined blocks. Hope this helps.