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DTG - device tree generator limitations

Honored Contributor II



In documentation it is said: 


"There are a number of components that can be connected to HPS portion of the soc ( FPGA that require Device Tree information for their drivers. Since Qsys not aware of the components outside the FPGA fabric, this information must be provided to the Device Tree Generator." 


I am not sure I understand this, what exactly should be manually added to dts file ? 


Can anyone help understanding DTG limitations with dts ? 



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